Update on Intel's Panther Lake at Computex 2024, Intel Powering Up Intel 18A Wafer Next Week
During the Intel keynote hosted by CEO Pat Gelsinger, he gave the world a glimpse into the Intel Client roadmap until 2026. Meteor Lake launched last year on that roadmap, and Lunar Lake, which we dived into yesterday as Intel disclosed technical details about the upcoming platform. Pat also presented a wafer on stage, Panther Lake, and he gave some additional information about Intel's forthcoming Panther Lake platform, which is expected in 2025.
We covered Intel's initial announcement about the Panther Lake platform last year. It is set to be Intel's first client platform using its Intel 18A node. Aside from once again affirming that things are on track for a 2026 launch, Pat Gelsinger, Intel's CEO, also confirmed that they will be powering on the first 18A wafer for Panther Lake as early as next week.
| Intel CPU Architecture Generations | |||||
| Alder/Raptor Lake | Meteor Lake |
Lunar Lake |
Arrow Lake |
Panther Lake |
|
| P-Core Architecture | Golden Cove/ Raptor Cove |
Redwood Cove | Lion Cove | Lion Cove | Cougar Cove? |
| E-Core Architecture | Gracemont | Crestmont | Skymont | Crestmont? | Darkmont? |
| GPU Architecture | Xe-LP | Xe-LPG | Xe2 | Xe2? | ? |
| NPU Architecture | N/A | NPU 3720 | NPU 4 | ? | ? |
| Active Tiles | 1 (Monolithic) | 4 | 2 | 4? | ? |
| Manufacturing Processes | Intel 7 | Intel 4 + TSMC N6 + TSMC N5 | TSMC N3B + TSMC N6 | Intel 20A + More | Intel 18A + ? |
| Segment | Mobile + Desktop | Mobile | LP Mobile | HP Mobile + Desktop | Mobile? |
| Release Date (OEM) | Q4'2021 | Q4'2023 | Q3'2024 | Q4'2024 | 2025 |
One element to consider from last year is that Lunar Lake is built using TSMC, with the Lunar Lake compute tile with Xe2-LPG graphics on TSMC N3B, and the I/O tile on TSMC N6. Pat confirmed on stage that Panther Lake will be on Intel 18A. Still, he didn't confirm whether the chip will be made purely at Intel, or a mix between Intel and external foundries (ala Meteor Lake). Intel has also yet to confirm the CPU cores to be used, but from what our sources tell us, it sounds like it will be the new Cougar Cove and Darkmont cores.
As we head into the second half of 2024 and after Lunar Lake launches, Intel may divulge more information, including the architectural advancements Panther Lake is expected to bring. Until then, we will have to wait and see.
CPUs
Posted by The Techinical Support
G.Skill Intros Low Latency DDR5 Memory Modules: CL30 at 6400 MT/s 
G.Skill on Tuesday introduced its ultra-low-latency DDR5-6400 memory modules that feature a CAS latency of 30 clocks, which appears to be the industry's most aggressive timings yet for DDR5-6400 sticks. The modules will be available for both AMD and Intel CPU-based systems.
With every new generation of DDR memory comes an increase in data transfer rates and an extension of relative latencies. While for the vast majority of applications, the increased bandwidth offsets the performance impact of higher timings, there are applications that favor low latencies. However, shrinking latencies is sometimes harder than increasing data transfer rates, which is why low-latency modules are rare.
Nonetheless, G.Skill has apparently managed to cherry-pick enough DDR5 memory chips and build appropriate printed circuit boards to produce DDR5-6400 modules with CL30 timings, which are substantially lower than the CL46 timings recommended by JEDEC for this speed bin. This means that while JEDEC-standard modules have an absolute latency of 14.375 ns, G.Skill's modules can boast a latency of just 9.375 ns – an approximately 35% decrease.
G.Skill's DDR5-6400 CL30 39-39-102 modules have a capacity of 16 GB and will be available in 32 GB dual-channel kits, though the company does not disclose voltages, which are likely considerably higher than those standardized by JEDEC.
The company plans to make its DDR5-6400 modules available both for AMD systems with EXPO profiles (Trident Z5 Neo RGB and Trident Z5 Royal Neo) and for Intel-powered PCs with XMP 3.0 profiles (Trident Z5 RGB and Trident Z5 Royal). For AMD AM5 systems that have a practical limitation of 6000 MT/s – 6400 MT/s for DDR5 memory (as this is roughly as fast as AMD's Infinity Fabric can operate at with a 1:1 ratio), the new modules will be particularly beneficial for AMD's Ryzen 7000 and Ryzen 9000-series processors.
G.Skill notes that since its modules are non-standard, they will not work with all systems but will operate on high-end motherboards with properly cooled CPUs.
The new ultra-low-latency memory kits will be available worldwide from G.Skill's partners starting in late August 2024. The company did not disclose the pricing of these modules, but since we are talking about premium products that boast unique specifications, they are likely to be priced accordingly.
Memory
G.Skill Intros Low Latency DDR5 Memory Modules: CL30 at 6400 MT/s
G.Skill on Tuesday introduced its ultra-low-latency DDR5-6400 memory modules that feature a CAS latency of 30 clocks, which appears to be the industry's most aggressive timings yet for DDR5-6400 sticks. The modules will be available for both AMD and Intel CPU-based systems.
With every new generation of DDR memory comes an increase in data transfer rates and an extension of relative latencies. While for the vast majority of applications, the increased bandwidth offsets the performance impact of higher timings, there are applications that favor low latencies. However, shrinking latencies is sometimes harder than increasing data transfer rates, which is why low-latency modules are rare.
Nonetheless, G.Skill has apparently managed to cherry-pick enough DDR5 memory chips and build appropriate printed circuit boards to produce DDR5-6400 modules with CL30 timings, which are substantially lower than the CL46 timings recommended by JEDEC for this speed bin. This means that while JEDEC-standard modules have an absolute latency of 14.375 ns, G.Skill's modules can boast a latency of just 9.375 ns – an approximately 35% decrease.
G.Skill's DDR5-6400 CL30 39-39-102 modules have a capacity of 16 GB and will be available in 32 GB dual-channel kits, though the company does not disclose voltages, which are likely considerably higher than those standardized by JEDEC.
The company plans to make its DDR5-6400 modules available both for AMD systems with EXPO profiles (Trident Z5 Neo RGB and Trident Z5 Royal Neo) and for Intel-powered PCs with XMP 3.0 profiles (Trident Z5 RGB and Trident Z5 Royal). For AMD AM5 systems that have a practical limitation of 6000 MT/s – 6400 MT/s for DDR5 memory (as this is roughly as fast as AMD's Infinity Fabric can operate at with a 1:1 ratio), the new modules will be particularly beneficial for AMD's Ryzen 7000 and Ryzen 9000-series processors.
G.Skill notes that since its modules are non-standard, they will not work with all systems but will operate on high-end motherboards with properly cooled CPUs.
The new ultra-low-latency memory kits will be available worldwide from G.Skill's partners starting in late August 2024. The company did not disclose the pricing of these modules, but since we are talking about premium products that boast unique specifications, they are likely to be priced accordingly.
Memory
NVIDIA's AD102 GPU Pops Up in MSI GeForce RTX 4070 Ti Super Cards 
As GPU families enter the later part of their lifecycles, we often see chip manufacturers start to offload stockpiles of salvaged chips that, for one reason or another, didn't make the grade for the tier of cards they normally are used in. These recovered chips are fairly unremarkable overall, but they are unsold silicon that still works and has economic value, leading to them being used in lower-tier cards so that they can be sold. And, judging by the appearance of a new video card design from MSI, it looks like NVIDIA's Ada Lovelace generation of chips has reached that stage, as the Taiwanese video card maker has put out a new GeForce RTX 4070 Ti Super card based on a salvaged AD102 GPU.
Typically based on NVIDIA's AD103 GPU, NVIDIA's GeForce RTX 4070 Ti Super series sits a step below the company's flagship RTX 4080/4090 cards, both of which are based on the bigger and badder AD102 chip. But with some number of AD102 chips inevitably failing to live up to RTX 4080 specifications, rather than being thrown out, these chips can instead be used to make RTX 4070 cards. Which is exactly what MSI has done with their new GeForce RTX 4070 Ti Super Ventus 3X Black OC graphics card.
The card itself is relatively unremarkable – using a binned AD102 chip doesn't come with any advantages, and it should perform just like regular AD103 cards – and for that reason, video card vendors rarely publicly note when they're doing a run of cards with a binned-down version of a bigger chip. However, these larger chips have a tell-tale PCB footprint that usually makes it obvious what's going on. Which, as first noticed by @wxnod, is exactly what's going on with MSI's card.
Ada Lovelace Lineup: MSI GeForce RTX 4070 TiS (AD103), RTX 4070 TiS (AD102), & RTX 4090 (AD102)
The tell, in this case, is the rear board shot provided by MSI. The larger AD102 GPU uses an equally larger mounting bracket, and is paired with a slightly more complex array of filtering capacitors on the back side of the board PCB. Ultimately, since these are visible in MSI's photos of their GeForce RTX 4070 Ti Super Ventus 3X Black OC, it's easy to compare it to other video cards and see that it has exactly the same capacitor layout as MSI's GeForce RTX 4090, thus confirming the use of an AD102 GPU.
Chip curiosities aside, all of NVIDIA GeForce RTX 4070 Ti Super graphics cards – no matter whether they are based on the AD102 or AD103 GPU – come with a GPU with 8,448 active CUDA cores and 16 GB of GDDR6X memory, so it doesn't (typically) matter which chip they carry. Otherwise, compared to a fully-enabled AD102 chip, the RTX 4070 Ti Super specifications are relatively modest, with fewer than half as many CUDA cores, underscoring how the AD102 chip being used in MSI's card is a pretty heavy salvage bin.
As for the rest of the card, MSI GeForce RTX 4070 Ti Super Ventus 3X Black OC is a relatively hefty card overall, with a cooling system to match. Being overclocked, the Ventus also has a slightly higher TDP than normal GeForce RTX 4070 Ti Super cards, weighing in at 295 Watts, or 10 Watts above baseline cards.
Meanwhile, MSI is apparently not the only video card manufacturer using salvaged AD102 chips for GeForce RTX 4070 Ti Super, either. @wxnod has also posted a screenshot obtained on an Inno3D GeForce RTX 4070 Ti Super based on an AD102 GPU.
GPUs
Ada Lovelace Lineup: MSI GeForce RTX 4070 TiS (AD103), RTX 4070 TiS (AD102), & RTX 4090 (AD102)
ASMedia Preps USB4 v2 Controller and PHY 
The USB Implementers Forum (USB-IF) introduced USB4 version 2.0 in fall 2022, and it expects systems and devices with the tech to emerge later this year and into next year. These upcoming products will largely rely on Intel's Barlow Ridge controller, a full-featured Thunderbolt 5 controller that goes above and beond the baseline USB4 v2 spec. And though extremely capable, Intel's Thunderbolt controllers are also quite expensive, and Barlow Ridge isn't expected to be any different. Fortunately, for system and device vendors that just need a basic USB4 v2 solution, ASMedia is also working on its own USB4 v2 controller.
At Computex 2024, ASMedia demonstrated a prototype of its upcoming USB4 v2 physical interface (PHY), which will support USB4 v2's new Gen 4 (160Gbps) data rates and the associated PAM-3 signal encoding. The prototype was implemented using an FPGA, as the company yet has to tape out the completed controller.
Ultimately, the purpose of showing off a FPGA-based PHY at Computex was to allow ASMedia to demonstrate their current PHY design. With the shift to PAM-3 encoding for USB4 v2, ASMedia (and the rest of the USB ecosystem) must develop significantly more complex controllers – and there's no part of that more critical than a solid and reliable PHY design.
As part of their demonstration, ASMedia had a classic eye diagram display. The eye diagram demoed has a clear opening in the center, which is indicative of good signal integrity, as the larger the eye opening, the less distortion and noise in the signal. The horizontal width of the eye opening represents the time window in which the signal can be sampled correctly, so the relatively narrow horizontal spread of the eye opening suggests that there is minimal jitter, meaning the signal transitions are consistent and predictable. Finally, the vertical height of the eye opening indicates the signal amplitude and the rather tall eye opening suggests a higher signal-to-noise ratio (SNR), meaning that the signal is strong compared to any noise present.
ASMedia itself is one of the major suppliers for discrete USB controllers, so the availability of ASMedia's USB4 v2 chip is crucial for adoption of the standard in general. While Intel will spearhead the industry with their Barlow Ridge Thunderbolt 5/USB4 v2 controller, ASMedia's controller is poised to end up in a far larger range of devices. So the importance of the company's USB4 v2 PHY demo is hard to overstate.
Demos aside, ASMedia is hoping to tape the chip out soon. If all goes well, the company expects their first USB4 v2 controllers to hit the market some time in the second half of 2025.
Peripherals
![](https://twitter.com/share?url=https://compbuddey.blogspot.com/2024/06/update-on-intels-panther-lake-at_24.html&text=Update on Intel's Panther Lake at Computex 2024, Intel Powering Up Intel 18A Wafer Next Week <p align="center"><a href="https://www.anandtech.com/show/21430/update-on-intel-s-panther-lake-at-computex-2024-intel-powering-up-intel-18a-wafer-next-week"><img src="https://images.anandtech.com/doci/21430/2024-06-03 20_45_07_575px.jpg" alt="" /></a></p><p><p>During the Intel keynote hosted by CEO Pat Gelsinger, he gave the world a glimpse into the Intel Client roadmap until 2026. Meteor Lake launched last year on that roadmap, and Lunar Lake, which we dived into yesterday as Intel disclosed technical details about the upcoming platform. Pat also presented a wafer on stage, Panther Lake, and he gave some additional information about Intel's forthcoming Panther Lake platform, which is expected in 2025.</p>
<p>We covered <a href="https://www.anandtech.com/show/20065/intel-confirms-panther-lake-on-track-for-2025-at-intel-innovation-2023">Intel's initial announcement about the Panther Lake platform last year</a>. It is set to be Intel's first client platform using its Intel 18A node. Aside from once again affirming that things are on track for a 2026 launch, Pat Gelsinger, Intel's CEO, also confirmed that they will be powering on the first 18A wafer for Panther Lake as early as next week.</p>
<table border="0" style="text-align:center" width="95%">
<tbody>
<tr class="tgrey">
<td colspan="6">Intel CPU Architecture Generations</td>
</tr>
<tr class="tlblue">
<td> </td>
<td>Alder/Raptor Lake</td>
<td>Meteor<br />
Lake</td>
<td>Lunar<br />
Lake</td>
<td>Arrow<br />
Lake</td>
<td>Panther<br />
Lake</td>
</tr>
<tr>
<td class="tlgrey">P-Core Architecture</td>
<td>Golden Cove/<br />
Raptor Cove</td>
<td>Redwood Cove</td>
<td>Lion Cove</td>
<td>Lion Cove</td>
<td>Cougar Cove?</td>
</tr>
<tr>
<td class="tlgrey">E-Core Architecture</td>
<td>Gracemont</td>
<td>Crestmont</td>
<td>Skymont</td>
<td>Crestmont?</td>
<td>Darkmont?</td>
</tr>
<tr>
<td class="tlgrey">GPU Architecture</td>
<td>Xe-LP</td>
<td>Xe-LPG</td>
<td>Xe2</td>
<td>Xe2?</td>
<td>?</td>
</tr>
<tr>
<td class="tlgrey">NPU Architecture</td>
<td>N/A</td>
<td>NPU 3720</td>
<td>NPU 4</td>
<td>?</td>
<td>?</td>
</tr>
<tr>
<td class="tlgrey">Active Tiles</td>
<td>1 (Monolithic)</td>
<td>4</td>
<td>2</td>
<td>4?</td>
<td>?</td>
</tr>
<tr>
<td class="tlgrey">Manufacturing Processes</td>
<td>Intel 7</td>
<td>Intel 4 + TSMC N6 + TSMC N5</td>
<td>TSMC N3B + TSMC N6</td>
<td>Intel 20A + More</td>
<td>Intel 18A + ?</td>
</tr>
<tr>
<td class="tlgrey">Segment</td>
<td>Mobile + Desktop</td>
<td>Mobile</td>
<td>LP Mobile</td>
<td>HP Mobile + Desktop</td>
<td>Mobile?</td>
</tr>
<tr>
<td class="tlgrey">Release Date (OEM)</td>
<td>Q4'2021</td>
<td>Q4'2023</td>
<td>Q3'2024</td>
<td>Q4'2024</td>
<td>2025</td>
</tr>
</tbody>
</table>
<p>One element to consider from last year is that Lunar Lake is built using TSMC, with the Lunar Lake compute tile with Xe2-LPG graphics on TSMC N3B, and the I/O tile on TSMC N6. Pat confirmed on stage that Panther Lake will be on Intel 18A. Still, he didn't confirm whether the chip will be made purely at Intel, or a mix between Intel and external foundries (ala Meteor Lake). Intel has also yet to confirm the CPU cores to be used, but from what our sources tell us, it sounds like it will be the new Cougar Cove and Darkmont cores.</p>
<p>As we head into the second half of 2024 and after Lunar Lake launches, Intel may divulge more information, including the architectural advancements Panther Lake is expected to bring. Until then, we will have to wait and see.</p>
</p> CPUs){kind=link}
![](https://www.pinterest.com/pin/create/button/?url=https://compbuddey.blogspot.com/2024/06/update-on-intels-panther-lake-at_24.html&media=https://lh3.googleusercontent.com/blogger_img_proxy/AEn0k_u-WrpWOugfVuNggRMQDlswWQwvheVH25Jw6eTd0NJEPw1j1KqQUGSxlpooE9ZbFY33fqn5jqWW3z1ER7HDUc5IWSLvw7fjEw7sufMls8XLyVTvz851LV9PIXtKqrboQ0pZ7oqKo5zscEbg&description=Update on Intel's Panther Lake at Computex 2024, Intel Powering Up Intel 18A Wafer Next Week <p align="center"><a href="https://www.anandtech.com/show/21430/update-on-intel-s-panther-lake-at-computex-2024-intel-powering-up-intel-18a-wafer-next-week"><img src="https://images.anandtech.com/doci/21430/2024-06-03 20_45_07_575px.jpg" alt="" /></a></p><p><p>During the Intel keynote hosted by CEO Pat Gelsinger, he gave the world a glimpse into the Intel Client roadmap until 2026. Meteor Lake launched last year on that roadmap, and Lunar Lake, which we dived into yesterday as Intel disclosed technical details about the upcoming platform. Pat also presented a wafer on stage, Panther Lake, and he gave some additional information about Intel's forthcoming Panther Lake platform, which is expected in 2025.</p>
<p>We covered <a href="https://www.anandtech.com/show/20065/intel-confirms-panther-lake-on-track-for-2025-at-intel-innovation-2023">Intel's initial announcement about the Panther Lake platform last year</a>. It is set to be Intel's first client platform using its Intel 18A node. Aside from once again affirming that things are on track for a 2026 launch, Pat Gelsinger, Intel's CEO, also confirmed that they will be powering on the first 18A wafer for Panther Lake as early as next week.</p>
<table border="0" style="text-align:center" width="95%">
<tbody>
<tr class="tgrey">
<td colspan="6">Intel CPU Architecture Generations</td>
</tr>
<tr class="tlblue">
<td> </td>
<td>Alder/Raptor Lake</td>
<td>Meteor<br />
Lake</td>
<td>Lunar<br />
Lake</td>
<td>Arrow<br />
Lake</td>
<td>Panther<br />
Lake</td>
</tr>
<tr>
<td class="tlgrey">P-Core Architecture</td>
<td>Golden Cove/<br />
Raptor Cove</td>
<td>Redwood Cove</td>
<td>Lion Cove</td>
<td>Lion Cove</td>
<td>Cougar Cove?</td>
</tr>
<tr>
<td class="tlgrey">E-Core Architecture</td>
<td>Gracemont</td>
<td>Crestmont</td>
<td>Skymont</td>
<td>Crestmont?</td>
<td>Darkmont?</td>
</tr>
<tr>
<td class="tlgrey">GPU Architecture</td>
<td>Xe-LP</td>
<td>Xe-LPG</td>
<td>Xe2</td>
<td>Xe2?</td>
<td>?</td>
</tr>
<tr>
<td class="tlgrey">NPU Architecture</td>
<td>N/A</td>
<td>NPU 3720</td>
<td>NPU 4</td>
<td>?</td>
<td>?</td>
</tr>
<tr>
<td class="tlgrey">Active Tiles</td>
<td>1 (Monolithic)</td>
<td>4</td>
<td>2</td>
<td>4?</td>
<td>?</td>
</tr>
<tr>
<td class="tlgrey">Manufacturing Processes</td>
<td>Intel 7</td>
<td>Intel 4 + TSMC N6 + TSMC N5</td>
<td>TSMC N3B + TSMC N6</td>
<td>Intel 20A + More</td>
<td>Intel 18A + ?</td>
</tr>
<tr>
<td class="tlgrey">Segment</td>
<td>Mobile + Desktop</td>
<td>Mobile</td>
<td>LP Mobile</td>
<td>HP Mobile + Desktop</td>
<td>Mobile?</td>
</tr>
<tr>
<td class="tlgrey">Release Date (OEM)</td>
<td>Q4'2021</td>
<td>Q4'2023</td>
<td>Q3'2024</td>
<td>Q4'2024</td>
<td>2025</td>
</tr>
</tbody>
</table>
<p>One element to consider from last year is that Lunar Lake is built using TSMC, with the Lunar Lake compute tile with Xe2-LPG graphics on TSMC N3B, and the I/O tile on TSMC N6. Pat confirmed on stage that Panther Lake will be on Intel 18A. Still, he didn't confirm whether the chip will be made purely at Intel, or a mix between Intel and external foundries (ala Meteor Lake). Intel has also yet to confirm the CPU cores to be used, but from what our sources tell us, it sounds like it will be the new Cougar Cove and Darkmont cores.</p>
<p>As we head into the second half of 2024 and after Lunar Lake launches, Intel may divulge more information, including the architectural advancements Panther Lake is expected to bring. Until then, we will have to wait and see.</p>
</p> CPUs){kind=link}
![](https://web.whatsapp.com/send?text=Update on Intel's Panther Lake at Computex 2024, Intel Powering Up Intel 18A Wafer Next Week <p align="center"><a href="https://www.anandtech.com/show/21430/update-on-intel-s-panther-lake-at-computex-2024-intel-powering-up-intel-18a-wafer-next-week"><img src="https://images.anandtech.com/doci/21430/2024-06-03 20_45_07_575px.jpg" alt="" /></a></p><p><p>During the Intel keynote hosted by CEO Pat Gelsinger, he gave the world a glimpse into the Intel Client roadmap until 2026. Meteor Lake launched last year on that roadmap, and Lunar Lake, which we dived into yesterday as Intel disclosed technical details about the upcoming platform. Pat also presented a wafer on stage, Panther Lake, and he gave some additional information about Intel's forthcoming Panther Lake platform, which is expected in 2025.</p>
<p>We covered <a href="https://www.anandtech.com/show/20065/intel-confirms-panther-lake-on-track-for-2025-at-intel-innovation-2023">Intel's initial announcement about the Panther Lake platform last year</a>. It is set to be Intel's first client platform using its Intel 18A node. Aside from once again affirming that things are on track for a 2026 launch, Pat Gelsinger, Intel's CEO, also confirmed that they will be powering on the first 18A wafer for Panther Lake as early as next week.</p>
<table border="0" style="text-align:center" width="95%">
<tbody>
<tr class="tgrey">
<td colspan="6">Intel CPU Architecture Generations</td>
</tr>
<tr class="tlblue">
<td> </td>
<td>Alder/Raptor Lake</td>
<td>Meteor<br />
Lake</td>
<td>Lunar<br />
Lake</td>
<td>Arrow<br />
Lake</td>
<td>Panther<br />
Lake</td>
</tr>
<tr>
<td class="tlgrey">P-Core Architecture</td>
<td>Golden Cove/<br />
Raptor Cove</td>
<td>Redwood Cove</td>
<td>Lion Cove</td>
<td>Lion Cove</td>
<td>Cougar Cove?</td>
</tr>
<tr>
<td class="tlgrey">E-Core Architecture</td>
<td>Gracemont</td>
<td>Crestmont</td>
<td>Skymont</td>
<td>Crestmont?</td>
<td>Darkmont?</td>
</tr>
<tr>
<td class="tlgrey">GPU Architecture</td>
<td>Xe-LP</td>
<td>Xe-LPG</td>
<td>Xe2</td>
<td>Xe2?</td>
<td>?</td>
</tr>
<tr>
<td class="tlgrey">NPU Architecture</td>
<td>N/A</td>
<td>NPU 3720</td>
<td>NPU 4</td>
<td>?</td>
<td>?</td>
</tr>
<tr>
<td class="tlgrey">Active Tiles</td>
<td>1 (Monolithic)</td>
<td>4</td>
<td>2</td>
<td>4?</td>
<td>?</td>
</tr>
<tr>
<td class="tlgrey">Manufacturing Processes</td>
<td>Intel 7</td>
<td>Intel 4 + TSMC N6 + TSMC N5</td>
<td>TSMC N3B + TSMC N6</td>
<td>Intel 20A + More</td>
<td>Intel 18A + ?</td>
</tr>
<tr>
<td class="tlgrey">Segment</td>
<td>Mobile + Desktop</td>
<td>Mobile</td>
<td>LP Mobile</td>
<td>HP Mobile + Desktop</td>
<td>Mobile?</td>
</tr>
<tr>
<td class="tlgrey">Release Date (OEM)</td>
<td>Q4'2021</td>
<td>Q4'2023</td>
<td>Q3'2024</td>
<td>Q4'2024</td>
<td>2025</td>
</tr>
</tbody>
</table>
<p>One element to consider from last year is that Lunar Lake is built using TSMC, with the Lunar Lake compute tile with Xe2-LPG graphics on TSMC N3B, and the I/O tile on TSMC N6. Pat confirmed on stage that Panther Lake will be on Intel 18A. Still, he didn't confirm whether the chip will be made purely at Intel, or a mix between Intel and external foundries (ala Meteor Lake). Intel has also yet to confirm the CPU cores to be used, but from what our sources tell us, it sounds like it will be the new Cougar Cove and Darkmont cores.</p>
<p>As we head into the second half of 2024 and after Lunar Lake launches, Intel may divulge more information, including the architectural advancements Panther Lake is expected to bring. Until then, we will have to wait and see.</p>
</p> CPUs | https://compbuddey.blogspot.com/2024/06/update-on-intels-panther-lake-at_24.html){kind=link}
![](mailto:?subject=Update on Intel's Panther Lake at Computex 2024, Intel Powering Up Intel 18A Wafer Next Week <p align="center"><a href="https://www.anandtech.com/show/21430/update-on-intel-s-panther-lake-at-computex-2024-intel-powering-up-intel-18a-wafer-next-week"><img src="https://images.anandtech.com/doci/21430/2024-06-03 20_45_07_575px.jpg" alt="" /></a></p><p><p>During the Intel keynote hosted by CEO Pat Gelsinger, he gave the world a glimpse into the Intel Client roadmap until 2026. Meteor Lake launched last year on that roadmap, and Lunar Lake, which we dived into yesterday as Intel disclosed technical details about the upcoming platform. Pat also presented a wafer on stage, Panther Lake, and he gave some additional information about Intel's forthcoming Panther Lake platform, which is expected in 2025.</p>
<p>We covered <a href="https://www.anandtech.com/show/20065/intel-confirms-panther-lake-on-track-for-2025-at-intel-innovation-2023">Intel's initial announcement about the Panther Lake platform last year</a>. It is set to be Intel's first client platform using its Intel 18A node. Aside from once again affirming that things are on track for a 2026 launch, Pat Gelsinger, Intel's CEO, also confirmed that they will be powering on the first 18A wafer for Panther Lake as early as next week.</p>
<table border="0" style="text-align:center" width="95%">
<tbody>
<tr class="tgrey">
<td colspan="6">Intel CPU Architecture Generations</td>
</tr>
<tr class="tlblue">
<td> </td>
<td>Alder/Raptor Lake</td>
<td>Meteor<br />
Lake</td>
<td>Lunar<br />
Lake</td>
<td>Arrow<br />
Lake</td>
<td>Panther<br />
Lake</td>
</tr>
<tr>
<td class="tlgrey">P-Core Architecture</td>
<td>Golden Cove/<br />
Raptor Cove</td>
<td>Redwood Cove</td>
<td>Lion Cove</td>
<td>Lion Cove</td>
<td>Cougar Cove?</td>
</tr>
<tr>
<td class="tlgrey">E-Core Architecture</td>
<td>Gracemont</td>
<td>Crestmont</td>
<td>Skymont</td>
<td>Crestmont?</td>
<td>Darkmont?</td>
</tr>
<tr>
<td class="tlgrey">GPU Architecture</td>
<td>Xe-LP</td>
<td>Xe-LPG</td>
<td>Xe2</td>
<td>Xe2?</td>
<td>?</td>
</tr>
<tr>
<td class="tlgrey">NPU Architecture</td>
<td>N/A</td>
<td>NPU 3720</td>
<td>NPU 4</td>
<td>?</td>
<td>?</td>
</tr>
<tr>
<td class="tlgrey">Active Tiles</td>
<td>1 (Monolithic)</td>
<td>4</td>
<td>2</td>
<td>4?</td>
<td>?</td>
</tr>
<tr>
<td class="tlgrey">Manufacturing Processes</td>
<td>Intel 7</td>
<td>Intel 4 + TSMC N6 + TSMC N5</td>
<td>TSMC N3B + TSMC N6</td>
<td>Intel 20A + More</td>
<td>Intel 18A + ?</td>
</tr>
<tr>
<td class="tlgrey">Segment</td>
<td>Mobile + Desktop</td>
<td>Mobile</td>
<td>LP Mobile</td>
<td>HP Mobile + Desktop</td>
<td>Mobile?</td>
</tr>
<tr>
<td class="tlgrey">Release Date (OEM)</td>
<td>Q4'2021</td>
<td>Q4'2023</td>
<td>Q3'2024</td>
<td>Q4'2024</td>
<td>2025</td>
</tr>
</tbody>
</table>
<p>One element to consider from last year is that Lunar Lake is built using TSMC, with the Lunar Lake compute tile with Xe2-LPG graphics on TSMC N3B, and the I/O tile on TSMC N6. Pat confirmed on stage that Panther Lake will be on Intel 18A. Still, he didn't confirm whether the chip will be made purely at Intel, or a mix between Intel and external foundries (ala Meteor Lake). Intel has also yet to confirm the CPU cores to be used, but from what our sources tell us, it sounds like it will be the new Cougar Cove and Darkmont cores.</p>
<p>As we head into the second half of 2024 and after Lunar Lake launches, Intel may divulge more information, including the architectural advancements Panther Lake is expected to bring. Until then, we will have to wait and see.</p>
</p> CPUs&body=https://compbuddey.blogspot.com/2024/06/update-on-intels-panther-lake-at_24.html){kind=link}
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G.Skill Intros Low Latency DDR5 Memory Modules: CL30 at 6400 MT/s
G.Skill on Tuesday introduced its ultra-low-latency DDR5-6400 memory modules that feature a CAS latency of 30 clocks, which appears to be the industry's most aggressive timings yet for DDR5-6400 sticks. The modules will be available for both AMD and Intel CPU-based systems.
With every new generation of DDR memory comes an increase in data transfer rates and an extension of relative latencies. While for the vast majority of applications, the increased bandwidth offsets the performance impact of higher timings, there are applications that favor low latencies. However, shrinking latencies is sometimes harder than increasing data transfer rates, which is why low-latency modules are rare.
Nonetheless, G.Skill has apparently managed to cherry-pick enough DDR5 memory chips and build appropriate printed circuit boards to produce DDR5-6400 modules with CL30 timings, which are substantially lower than the CL46 timings recommended by JEDEC for this speed bin. This means that while JEDEC-standard modules have an absolute latency of 14.375 ns, G.Skill's modules can boast a latency of just 9.375 ns – an approximately 35% decrease.
G.Skill's DDR5-6400 CL30 39-39-102 modules have a capacity of 16 GB and will be available in 32 GB dual-channel kits, though the company does not disclose voltages, which are likely considerably higher than those standardized by JEDEC.
The company plans to make its DDR5-6400 modules available both for AMD systems with EXPO profiles (Trident Z5 Neo RGB and Trident Z5 Royal Neo) and for Intel-powered PCs with XMP 3.0 profiles (Trident Z5 RGB and Trident Z5 Royal). For AMD AM5 systems that have a practical limitation of 6000 MT/s – 6400 MT/s for DDR5 memory (as this is roughly as fast as AMD's Infinity Fabric can operate at with a 1:1 ratio), the new modules will be particularly beneficial for AMD's Ryzen 7000 and Ryzen 9000-series processors.
G.Skill notes that since its modules are non-standard, they will not work with all systems but will operate on high-end motherboards with properly cooled CPUs.
The new ultra-low-latency memory kits will be available worldwide from G.Skill's partners starting in late August 2024. The company did not disclose the pricing of these modules, but since we are talking about premium products that boast unique specifications, they are likely to be priced accordingly.
Memory
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