SK Hynix Starts Mass Production of HBM3E: 9.2 GT/s
SK Hynix said that it had started volume production of its HBM3E memory and would supply it to a customer in late March. The South Korean company is the second DRAM producer to announce mass production of HBM3E, so the market of ultra-high-performance memory will have some competition, which is good for companies that plan to use HBM3E.
According to specifications, SK Hynix's HBM3E known good stack dies (KGSDs) feature data transfer rates up to 9.2 GT/s, a 1024-bit interface, and a bandwidth of 1.18 TB/s, which is massively higher than the 6.4 GT/s and 819 GB/s offered by HBM3. The company does not say whether it mass produces 8Hi 24GB HBM3E memory modules or 12Hi 36GB HBM3E devices, but it will likely begin its HBM3E ramp from lower-capacity products as they are easier to make.
We already know that SK Hynix's HBM3E stacks employ the company's advanced Mass Reflow Molded Underfill (MR-RUF) technology, which promises to reduce heat dissipation by 10%. This technology involves the use of an enhanced underfill between DRAM layers, which not only improves heat dissipation but also reduces the thickness of HBM stacks. As a result, 12-Hi HBM stacks can be constructed that are the same height as 8-Hi modules. However, this does not necessarily imply that the stacks currently in mass production are 12-Hi HBM3E stacks.
Although the memory maker does not officially confirm this, SK Hynix's 24GB HBM3E stacks will arrive just in time to address NVIDIA's Blackwell accelerator family for artificial intelligence and high-performance computing applications.
"With the success story of the HBM business and the strong partnership with customers that it has built for years, SK Hynix will cement its position as the total AI memory provider," said Sungsoo Ryu, Head of HBM business at SK Hynix. As a result, NVIDIA will have access to HBM3E memory from multiple suppliers with both Micron and SK Hynix.
Meanwhile, AMD recently confirmed that it was looking forward to expanding its Instinct MI300-series lineup for AI and HPC applications with higher-performance memory configurations, so SK Hynix's HBM3E memory could also be used for this.
DRAM
Posted by The Techinical Support
![TSMC to Expand Specialty Capacity by 50%, Introduce 4nm N4e Low-Power Node <p align="center"><a href="https://www.anandtech.com/show/21397/tsmc-to-expand-specialty-capacity-by-50-introduce-4nm-lowpower-node"><img src="https://images.anandtech.com/doci/21397/tsmc-semiconductor-fab-wafer-1-678_575px.jpg" alt="" /></a></p><p><p>With all the new fabs being built in Germany and Japan, as well as the expansion of production capacity in China, TSMC is planning to extend its production capacity for specialty technologies by 50% by 2027. As disclosed by the company during its European Technology Symposium this week, TSMC expects to need to not only convert existing capacity to meet demands for specialty processes, but even build new (greenfield) fab space just for this purpose. One of the big drivers for this demand, in turn, will be TSMC's next specialty node: N4e, a 4nm-class ultra-low-power production node.</p>
<p>"In the past, we always did the review phase [for upcoming fabs], but for the first time in a long time at TSMC, we started building greenfield fab that will address the future specialty technology requirements," said Dr. Kevin Zhang, Senior Vice President, Business Development and Overseas Operations Office, at the event. "In the next four to five years, we actually going to grow our specialty capacity by up to 1.5x. In doing so we actually expanding the footprint of our manufacturing network to improve the resiliency of the overall fab supply chain."</p>
<p>On top of its well-known major logic nodes like N5 and N3E, TSMC also offers a suite of specialty nodes for applications such as power semiconductors, mixed analog I/O, and ultra-low-power applications (e.g. IoT). These are typically based on the company's trailing manufacturing processes, but regardless of the underlying technology, the capacity demand for these nodes is growing right alongside the demand for TSMC's major logic nodes. All of which has required TSMC to reevaluate how they go about planning for capacity on their specialty nodes.</p>
<p>TSMC's expansion strategy in the recent years has pursued several goals. One of them has been to build new fabs outside of Taiwan; another has been to generally expand production capacity to meet future demand for all types of process technologies – which is why the company is building up capacity for specialty nodes.</p>
<p>At present, TSMC's most advanced specialty node is N6e, an N7/N6 variant that supports operating voltages between 0.4V and 0.9V. With N4e, TSMC is looking at voltages below 0.4V. Though for now, TSMC is not disclosing much in the way of technical details for the planned node; given the company's history here, we expect they'll have more to talk about next year once the new process is ready.</p>
</p> Semiconductors](https://lh3.googleusercontent.com/blogger_img_proxy/AEn0k_v6Bf-vbVU0ttDa-0OVG6EjMe4KrOKNJcusXFIQPDvamTUd5lq5ls_OcVzgCm6jV4qCRsRdv_tHqgQeBf0XTKl5N8cX3MRpKiBq_5tRjSgtad6rNLSH8409FYmWxbYN9wHHg6llAbthue8I14GaItGrnb8W8epAVw=w72-h72-p-k-no-nu)
CUDIMM Standard Set to Make Desktop Memory a Bit Smarter and a Lot More Robust While the new CAMM and LPCAMM memory modules for laptops have garnered a great deal of attention in recent months, it's not just the mobile side of the PC memory industry that is looking at changes. The desktop memory market is also coming due for some upgrades to further improve DIMM performance, in the form of a new DIMM variety called the Clocked Unbuffered DIMM (CUDIMM). And while this memory isn't in use quite yet, several memory vendors had their initial CUDIMM products on display at this year's Computex trade show, offering a glimpse into the future of desktop memory.
A variation on traditional Unbuffered DIMMs (UDIMMs), Clocked UDIMMs (and Clocked SODIMMs) have been created as another solution to the ongoing signal integrity challenges presented by DDR5 memory. DDR5 allows for rather speedy transfer rates with removable (and easily installed) DIMMs, but further performance increases are running up against the laws of physics when it comes to the electrical challenges of supporting memory on a stick – particularly with so many capacity/performance combinations like we see today. And while those challenges aren't insurmountable, if DDR5 (and eventually, DDR6) are to keep increasing in speed, some changes appear to be needed to produce more electrically robust DIMMs, which is giving rise to the CUDIMM.
Standardized by JEDEC earlier this year as JESD323, CUDIMMs tweak the traditional unbuffered DIMM by adding a clock driver (CKD) to the DIMM itself, with the tiny IC responsible for regenerating the clock signal driving the actual memory chips. By generating a clean clock locally on the DIMM (rather than directly using the clock from the CPU, as is the case today), CUDIMMs are designed to offer improved stability and reliability at high memory speeds, combating the electrical issues that would otherwise cause reliability issues at faster memory speeds. In other words, adding a clock driver is the key to keeping DDR5 operating reliably at high clockspeeds.
All told, JEDEC is proposing that CUDIMMs be used for DDR5-6400 speeds and higher, with the first version of the specification covering speeds up to DDR5-7200. The new DIMMs will also be drop-in compatible with existing platforms (at least on paper), using the same 288-pin connector as today's standard DDR5 UDIMM and allowing for a relatively smooth transition towards higher DDR5 clockspeeds.
Memory
Samsung's 128 TB-Class BM1743 Enterprise SSD Displayed at FMS 2024 
Samsung had quietly launched its BM1743 enterprise QLC SSD last month with a hefty 61.44 TB SKU. At FMS 2024, the company had the even larger 122.88 TB version of that SSD on display, alongside a few recorded benchmarking sessions. Compared to the previous generation, the BM1743 comes with a 4.1x improvement in I/O performance, improvement in data retention, and a 45% improvement in power efficiency for sequential writes.
The 128 TB-class QLC SSD boasts of sequential read speeds of 7.5 GBps and write speeds of 3 GBps. Random reads come in at 1.6 M IOPS, while 16 KB random writes clock in at 45K IOPS. Based on the quoted random write access granularity, it appears that Samsung is using a 16 KB indirection unit (IU) to optimize flash management. This is similar to the strategy adopted by Solidigm with IUs larger than 4K in their high-capacity SSDs.
A recorded benchmark session on the company's PM9D3a 8-channel Gen 5 SSD was also on display.
The SSD family is being promoted as a mainstream option for datacenters, and boasts of sequential reads up to 12 GBps and writes up to 6.8 GBps. Random reads clock in at 2 M IOPS, and random writes at 400 K IOPS.
Available in multiple form-factors up to 32 TB (M.2 tops out at 2 TB), the drive's firmware includes optional support for flexible data placement (FDP) to help address the write amplification aspect.
The PM1753 is the current enterprise SSD flagship in Samsung's lineup. With support for 16 NAND channels and capacities up to 32 TB, this U.2 / E3.S SSD has advertised sequential read and write speeds of 14.8 GBps and 11 GBps respectively. Random reads and writes for 4 KB accesses are listed at 3.4 M and 600 K IOPS.
Samsung claims a 1.7x performance improvement and a 1.7x power efficiency improvement over the previous generation (PM1743), making this TLC SSD suitable for AI servers.
The 9th Gen. V-NAND wafer was also available for viewing, though photography was prohibited. Mass production of this flash memory began in April 2024.
Storage
CUDIMM Standard Set to Make Desktop Memory a Bit Smarter and a Lot More Robust While the new CAMM and LPCAMM memory modules for laptops have garnered a great deal of attention in recent months, it's not just the mobile side of the PC memory industry that is looking at changes. The desktop memory market is also coming due for some upgrades to further improve DIMM performance, in the form of a new DIMM variety called the Clocked Unbuffered DIMM (CUDIMM). And while this memory isn't in use quite yet, several memory vendors had their initial CUDIMM products on display at this year's Computex trade show, offering a glimpse into the future of desktop memory.
A variation on traditional Unbuffered DIMMs (UDIMMs), Clocked UDIMMs (and Clocked SODIMMs) have been created as another solution to the ongoing signal integrity challenges presented by DDR5 memory. DDR5 allows for rather speedy transfer rates with removable (and easily installed) DIMMs, but further performance increases are running up against the laws of physics when it comes to the electrical challenges of supporting memory on a stick – particularly with so many capacity/performance combinations like we see today. And while those challenges aren't insurmountable, if DDR5 (and eventually, DDR6) are to keep increasing in speed, some changes appear to be needed to produce more electrically robust DIMMs, which is giving rise to the CUDIMM.
Standardized by JEDEC earlier this year as JESD323, CUDIMMs tweak the traditional unbuffered DIMM by adding a clock driver (CKD) to the DIMM itself, with the tiny IC responsible for regenerating the clock signal driving the actual memory chips. By generating a clean clock locally on the DIMM (rather than directly using the clock from the CPU, as is the case today), CUDIMMs are designed to offer improved stability and reliability at high memory speeds, combating the electrical issues that would otherwise cause reliability issues at faster memory speeds. In other words, adding a clock driver is the key to keeping DDR5 operating reliably at high clockspeeds.
All told, JEDEC is proposing that CUDIMMs be used for DDR5-6400 speeds and higher, with the first version of the specification covering speeds up to DDR5-7200. The new DIMMs will also be drop-in compatible with existing platforms (at least on paper), using the same 288-pin connector as today's standard DDR5 UDIMM and allowing for a relatively smooth transition towards higher DDR5 clockspeeds.
Memory
Samsung's 128 TB-Class BM1743 Enterprise SSD Displayed at FMS 2024
Samsung had quietly launched its BM1743 enterprise QLC SSD last month with a hefty 61.44 TB SKU. At FMS 2024, the company had the even larger 122.88 TB version of that SSD on display, alongside a few recorded benchmarking sessions. Compared to the previous generation, the BM1743 comes with a 4.1x improvement in I/O performance, improvement in data retention, and a 45% improvement in power efficiency for sequential writes.
The 128 TB-class QLC SSD boasts of sequential read speeds of 7.5 GBps and write speeds of 3 GBps. Random reads come in at 1.6 M IOPS, while 16 KB random writes clock in at 45K IOPS. Based on the quoted random write access granularity, it appears that Samsung is using a 16 KB indirection unit (IU) to optimize flash management. This is similar to the strategy adopted by Solidigm with IUs larger than 4K in their high-capacity SSDs.
A recorded benchmark session on the company's PM9D3a 8-channel Gen 5 SSD was also on display.
The SSD family is being promoted as a mainstream option for datacenters, and boasts of sequential reads up to 12 GBps and writes up to 6.8 GBps. Random reads clock in at 2 M IOPS, and random writes at 400 K IOPS.
Available in multiple form-factors up to 32 TB (M.2 tops out at 2 TB), the drive's firmware includes optional support for flexible data placement (FDP) to help address the write amplification aspect.
The PM1753 is the current enterprise SSD flagship in Samsung's lineup. With support for 16 NAND channels and capacities up to 32 TB, this U.2 / E3.S SSD has advertised sequential read and write speeds of 14.8 GBps and 11 GBps respectively. Random reads and writes for 4 KB accesses are listed at 3.4 M and 600 K IOPS.
Samsung claims a 1.7x performance improvement and a 1.7x power efficiency improvement over the previous generation (PM1743), making this TLC SSD suitable for AI servers.
The 9th Gen. V-NAND wafer was also available for viewing, though photography was prohibited. Mass production of this flash memory began in April 2024.
Storage
![](https://twitter.com/share?url=https://compbuddey.blogspot.com/2024/04/sk-hynix-starts-mass-production-of_9.html&text=SK Hynix Starts Mass Production of HBM3E: 9.2 GT/s <p align="center"><a href="https://www.anandtech.com/show/21311/sk-hynix-starts-mass-production-of-hbm3e-92-gts"><img src="https://images.anandtech.com/doci/21311/SK-hynix-HBM3E_01-678_575px.jpg" alt="" /></a></p><p><p>SK Hynix said that it had started volume production of its HBM3E memory and would supply it to a customer in late March. The South Korean company is the second DRAM producer to announce mass production of HBM3E, so the market of ultra-high-performance memory will have some competition, which is good for companies that plan to use HBM3E.</p>
<p>According to specifications, SK Hynix's HBM3E known good stack dies (KGSDs) feature data transfer rates up to 9.2 GT/s, a 1024-bit interface, and a bandwidth of 1.18 TB/s, which is massively higher than the 6.4 GT/s and 819 GB/s offered by HBM3. The company does not say whether it mass produces 8Hi 24GB HBM3E memory modules or 12Hi 36GB HBM3E devices, but it will likely begin its HBM3E ramp from lower-capacity products as they are easier to make.</p>
<p>We already know that SK Hynix's HBM3E stacks employ the company's advanced Mass Reflow Molded Underfill (MR-RUF) technology, which promises to reduce heat dissipation by 10%. This technology involves the use of an enhanced underfill between DRAM layers, which not only improves heat dissipation but also reduces the thickness of HBM stacks. As a result, 12-Hi HBM stacks can be constructed that are the same height as 8-Hi modules. However, this does not necessarily imply that the stacks currently in mass production are 12-Hi HBM3E stacks.</p>
<p>Although the memory maker does not officially confirm this, SK Hynix's 24GB HBM3E stacks will arrive just in time to address NVIDIA's Blackwell accelerator family for artificial intelligence and high-performance computing applications.</p>
<p>"<em>With the success story of the HBM business and the strong partnership with customers that it has built for years, SK Hynix will cement its position as the total AI memory provider,</em>" said Sungsoo Ryu, Head of HBM business at SK Hynix. As a result, NVIDIA will have access to HBM3E memory from multiple suppliers with both Micron and SK Hynix.</p>
<p>Meanwhile, AMD recently confirmed that it was looking forward to expanding its Instinct MI300-series lineup for AI and HPC applications with higher-performance memory configurations, so SK Hynix's HBM3E memory could also be used for this.</p>
</p> DRAM){kind=link}
![](https://www.pinterest.com/pin/create/button/?url=https://compbuddey.blogspot.com/2024/04/sk-hynix-starts-mass-production-of_9.html&media=https://lh3.googleusercontent.com/blogger_img_proxy/AEn0k_skEFIjE_TUOuUmVfltVFUY3XxNKR9CNXp-os5F4VfBUpjq7Szn3aaaPgLdTAOkwQ4XwTAw0gzRMyLG91zLWDFhdIW-IButQWeXY-T39-dIiC3ZLtFrFZR8eg2ETGg7W7VyaPNe8EracuPf&description=SK Hynix Starts Mass Production of HBM3E: 9.2 GT/s <p align="center"><a href="https://www.anandtech.com/show/21311/sk-hynix-starts-mass-production-of-hbm3e-92-gts"><img src="https://images.anandtech.com/doci/21311/SK-hynix-HBM3E_01-678_575px.jpg" alt="" /></a></p><p><p>SK Hynix said that it had started volume production of its HBM3E memory and would supply it to a customer in late March. The South Korean company is the second DRAM producer to announce mass production of HBM3E, so the market of ultra-high-performance memory will have some competition, which is good for companies that plan to use HBM3E.</p>
<p>According to specifications, SK Hynix's HBM3E known good stack dies (KGSDs) feature data transfer rates up to 9.2 GT/s, a 1024-bit interface, and a bandwidth of 1.18 TB/s, which is massively higher than the 6.4 GT/s and 819 GB/s offered by HBM3. The company does not say whether it mass produces 8Hi 24GB HBM3E memory modules or 12Hi 36GB HBM3E devices, but it will likely begin its HBM3E ramp from lower-capacity products as they are easier to make.</p>
<p>We already know that SK Hynix's HBM3E stacks employ the company's advanced Mass Reflow Molded Underfill (MR-RUF) technology, which promises to reduce heat dissipation by 10%. This technology involves the use of an enhanced underfill between DRAM layers, which not only improves heat dissipation but also reduces the thickness of HBM stacks. As a result, 12-Hi HBM stacks can be constructed that are the same height as 8-Hi modules. However, this does not necessarily imply that the stacks currently in mass production are 12-Hi HBM3E stacks.</p>
<p>Although the memory maker does not officially confirm this, SK Hynix's 24GB HBM3E stacks will arrive just in time to address NVIDIA's Blackwell accelerator family for artificial intelligence and high-performance computing applications.</p>
<p>"<em>With the success story of the HBM business and the strong partnership with customers that it has built for years, SK Hynix will cement its position as the total AI memory provider,</em>" said Sungsoo Ryu, Head of HBM business at SK Hynix. As a result, NVIDIA will have access to HBM3E memory from multiple suppliers with both Micron and SK Hynix.</p>
<p>Meanwhile, AMD recently confirmed that it was looking forward to expanding its Instinct MI300-series lineup for AI and HPC applications with higher-performance memory configurations, so SK Hynix's HBM3E memory could also be used for this.</p>
</p> DRAM){kind=link}
![](https://web.whatsapp.com/send?text=SK Hynix Starts Mass Production of HBM3E: 9.2 GT/s <p align="center"><a href="https://www.anandtech.com/show/21311/sk-hynix-starts-mass-production-of-hbm3e-92-gts"><img src="https://images.anandtech.com/doci/21311/SK-hynix-HBM3E_01-678_575px.jpg" alt="" /></a></p><p><p>SK Hynix said that it had started volume production of its HBM3E memory and would supply it to a customer in late March. The South Korean company is the second DRAM producer to announce mass production of HBM3E, so the market of ultra-high-performance memory will have some competition, which is good for companies that plan to use HBM3E.</p>
<p>According to specifications, SK Hynix's HBM3E known good stack dies (KGSDs) feature data transfer rates up to 9.2 GT/s, a 1024-bit interface, and a bandwidth of 1.18 TB/s, which is massively higher than the 6.4 GT/s and 819 GB/s offered by HBM3. The company does not say whether it mass produces 8Hi 24GB HBM3E memory modules or 12Hi 36GB HBM3E devices, but it will likely begin its HBM3E ramp from lower-capacity products as they are easier to make.</p>
<p>We already know that SK Hynix's HBM3E stacks employ the company's advanced Mass Reflow Molded Underfill (MR-RUF) technology, which promises to reduce heat dissipation by 10%. This technology involves the use of an enhanced underfill between DRAM layers, which not only improves heat dissipation but also reduces the thickness of HBM stacks. As a result, 12-Hi HBM stacks can be constructed that are the same height as 8-Hi modules. However, this does not necessarily imply that the stacks currently in mass production are 12-Hi HBM3E stacks.</p>
<p>Although the memory maker does not officially confirm this, SK Hynix's 24GB HBM3E stacks will arrive just in time to address NVIDIA's Blackwell accelerator family for artificial intelligence and high-performance computing applications.</p>
<p>"<em>With the success story of the HBM business and the strong partnership with customers that it has built for years, SK Hynix will cement its position as the total AI memory provider,</em>" said Sungsoo Ryu, Head of HBM business at SK Hynix. As a result, NVIDIA will have access to HBM3E memory from multiple suppliers with both Micron and SK Hynix.</p>
<p>Meanwhile, AMD recently confirmed that it was looking forward to expanding its Instinct MI300-series lineup for AI and HPC applications with higher-performance memory configurations, so SK Hynix's HBM3E memory could also be used for this.</p>
</p> DRAM | https://compbuddey.blogspot.com/2024/04/sk-hynix-starts-mass-production-of_9.html){kind=link}
![](mailto:?subject=SK Hynix Starts Mass Production of HBM3E: 9.2 GT/s <p align="center"><a href="https://www.anandtech.com/show/21311/sk-hynix-starts-mass-production-of-hbm3e-92-gts"><img src="https://images.anandtech.com/doci/21311/SK-hynix-HBM3E_01-678_575px.jpg" alt="" /></a></p><p><p>SK Hynix said that it had started volume production of its HBM3E memory and would supply it to a customer in late March. The South Korean company is the second DRAM producer to announce mass production of HBM3E, so the market of ultra-high-performance memory will have some competition, which is good for companies that plan to use HBM3E.</p>
<p>According to specifications, SK Hynix's HBM3E known good stack dies (KGSDs) feature data transfer rates up to 9.2 GT/s, a 1024-bit interface, and a bandwidth of 1.18 TB/s, which is massively higher than the 6.4 GT/s and 819 GB/s offered by HBM3. The company does not say whether it mass produces 8Hi 24GB HBM3E memory modules or 12Hi 36GB HBM3E devices, but it will likely begin its HBM3E ramp from lower-capacity products as they are easier to make.</p>
<p>We already know that SK Hynix's HBM3E stacks employ the company's advanced Mass Reflow Molded Underfill (MR-RUF) technology, which promises to reduce heat dissipation by 10%. This technology involves the use of an enhanced underfill between DRAM layers, which not only improves heat dissipation but also reduces the thickness of HBM stacks. As a result, 12-Hi HBM stacks can be constructed that are the same height as 8-Hi modules. However, this does not necessarily imply that the stacks currently in mass production are 12-Hi HBM3E stacks.</p>
<p>Although the memory maker does not officially confirm this, SK Hynix's 24GB HBM3E stacks will arrive just in time to address NVIDIA's Blackwell accelerator family for artificial intelligence and high-performance computing applications.</p>
<p>"<em>With the success story of the HBM business and the strong partnership with customers that it has built for years, SK Hynix will cement its position as the total AI memory provider,</em>" said Sungsoo Ryu, Head of HBM business at SK Hynix. As a result, NVIDIA will have access to HBM3E memory from multiple suppliers with both Micron and SK Hynix.</p>
<p>Meanwhile, AMD recently confirmed that it was looking forward to expanding its Instinct MI300-series lineup for AI and HPC applications with higher-performance memory configurations, so SK Hynix's HBM3E memory could also be used for this.</p>
</p> DRAM&body=https://compbuddey.blogspot.com/2024/04/sk-hynix-starts-mass-production-of_9.html){kind=link}
Micron Ships Crucial-Branded LPCAMM2 Memory Modules: 64GB of LPDDR5X For $330 
As LPCAMM2 adoption begins, the first retail memory modules are finally starting to hit the retail market, courtesy of Micron. The memory manufacturer has begun selling their LPDDR5X-based LPCAMM2 memory modules under their in-house Crucial brand, making them available on the latter's storefront. Timed to coincide with the release of Lenovo's ThinkPad P1 Gen 7 laptop – the first retail laptop designed to use the memory modules – this marks the de facto start of the eagerly-awaited modular LPDDR5X memory era.
Micron's Low Power Compression Attached Memory Module 2 (LPCAMM2) modules are available in capacities of 32 GB and 64 GB. These are dual-channel modules that feature a 128-bit wide interface, and are based around LPDDR5X memory running at data rates up to 7500 MT/s. This gives a single LPCAMM2 a peak bandwidth of 120 GB/s. Micron is not disclosing the latencies of its LPCAMM2 memory modules, but it says that high data transfer rates of LPDDR5X compensate for the extended timings.
Micron says that LPDDR5X memory offers significantly lower power consumption, with active power per 64-bit bus being 43-58% lower than DDR5 at the same speed, and standby power up to 80% lower. Meanwhile, similar to DDR5 modules, LPCAMM2 modules include a power management IC and voltage regulating circuitry, which provides module manufacturers additional opportunities to reduce power consumption of their products.
Source: Micron LPDDR5X LPCAMM2 Technical Brief
It's worth noting, however, that at least for the first generation of LPCAMM2 modules, system vendors will need to pick between modularity and performance. While soldered-down LPDDR5X memory is available at speeds up to 8533 MT/sec – and with 9600 MT/sec on the horizon – the fastest LPCAMM2 modules planned for this year by both Micron and rival Samsung will be running at 7500 MT/sec. So vendors will have to choose between the flexibility of offering modular LPDDR5X, or the higher bandwidth (and space savings) offered by soldering down their memory.
Micron, for its part, is projecting that 9600 MT/sec LPCAMM2 modules will be available by 2026. Though it's all but certain that faster memory will also be avaialble in the same timeframe.
Micron's Crucial LPDDR5X 32 GB module costs $174.99, whereas a 64 GB module costs $329.99.
Memory
Source: Micron LPDDR5X LPCAMM2 Technical Brief
Lorem Ipsum is simply dummy text of the printing and typesetting industry. Lorem Ipsum has been the industry's.
CUDIMM Standard Set to Make Desktop Memory a Bit Smarter and a Lot More Robust While the new CAMM and LPCAMM memory modules for laptops have garnered a great deal of attention in recent months, it's not just the mobile side of the PC memory industry that is looking at changes. The desktop memory market is also coming due for some upgrades to further improve DIMM performance, in the form of a new DIMM variety called the Clocked Unbuffered DIMM (CUDIMM). And while this memory isn't in use quite yet, several memory vendors had their initial CUDIMM products on display at this year's Computex trade show, offering a glimpse into the future of desktop memory.
A variation on traditional Unbuffered DIMMs (UDIMMs), Clocked UDIMMs (and Clocked SODIMMs) have been created as another solution to the ongoing signal integrity challenges presented by DDR5 memory. DDR5 allows for rather speedy transfer rates with removable (and easily installed) DIMMs, but further performance increases are running up against the laws of physics when it comes to the electrical challenges of supporting memory on a stick – particularly with so many capacity/performance combinations like we see today. And while those challenges aren't insurmountable, if DDR5 (and eventually, DDR6) are to keep increasing in speed, some changes appear to be needed to produce more electrically robust DIMMs, which is giving rise to the CUDIMM.
Standardized by JEDEC earlier this year as JESD323, CUDIMMs tweak the traditional unbuffered DIMM by adding a clock driver (CKD) to the DIMM itself, with the tiny IC responsible for regenerating the clock signal driving the actual memory chips. By generating a clean clock locally on the DIMM (rather than directly using the clock from the CPU, as is the case today), CUDIMMs are designed to offer improved stability and reliability at high memory speeds, combating the electrical issues that would otherwise cause reliability issues at faster memory speeds. In other words, adding a clock driver is the key to keeping DDR5 operating reliably at high clockspeeds.
All told, JEDEC is proposing that CUDIMMs be used for DDR5-6400 speeds and higher, with the first version of the specification covering speeds up to DDR5-7200. The new DIMMs will also be drop-in compatible with existing platforms (at least on paper), using the same 288-pin connector as today's standard DDR5 UDIMM and allowing for a relatively smooth transition towards higher DDR5 clockspeeds.
Memory
Samsung's 128 TB-Class BM1743 Enterprise SSD Displayed at FMS 2024
Samsung had quietly launched its BM1743 enterprise QLC SSD last month with a hefty 61.44 TB SKU. At FMS 2024, the company had the even larger 122.88 TB version of that SSD on display, alongside a few recorded benchmarking sessions. Compared to the previous generation, the BM1743 comes with a 4.1x improvement in I/O performance, improvement in data retention, and a 45% improvement in power efficiency for sequential writes.
The 128 TB-class QLC SSD boasts of sequential read speeds of 7.5 GBps and write speeds of 3 GBps. Random reads come in at 1.6 M IOPS, while 16 KB random writes clock in at 45K IOPS. Based on the quoted random write access granularity, it appears that Samsung is using a 16 KB indirection unit (IU) to optimize flash management. This is similar to the strategy adopted by Solidigm with IUs larger than 4K in their high-capacity SSDs.
A recorded benchmark session on the company's PM9D3a 8-channel Gen 5 SSD was also on display.
The SSD family is being promoted as a mainstream option for datacenters, and boasts of sequential reads up to 12 GBps and writes up to 6.8 GBps. Random reads clock in at 2 M IOPS, and random writes at 400 K IOPS.
Available in multiple form-factors up to 32 TB (M.2 tops out at 2 TB), the drive's firmware includes optional support for flexible data placement (FDP) to help address the write amplification aspect.
The PM1753 is the current enterprise SSD flagship in Samsung's lineup. With support for 16 NAND channels and capacities up to 32 TB, this U.2 / E3.S SSD has advertised sequential read and write speeds of 14.8 GBps and 11 GBps respectively. Random reads and writes for 4 KB accesses are listed at 3.4 M and 600 K IOPS.
Samsung claims a 1.7x performance improvement and a 1.7x power efficiency improvement over the previous generation (PM1743), making this TLC SSD suitable for AI servers.
The 9th Gen. V-NAND wafer was also available for viewing, though photography was prohibited. Mass production of this flash memory began in April 2024.
Storage
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