SK hynix Platinum P51 Gen5 SSD with 238L NAND Spotted at GTC
SK hynix is set to unveil their first Gen5 consumer NVMe SSD lineup shortly, based on the products at display in their GTC 2024 booth. The Platinum P51 M.2 2280 NVMe SSD will take over flagship duties from the Platinum P41 that has been serving the market for more than a year.
Similar to the Gold P31 and the Platinum P41, the Platinum P51 also uses an in-house SSD controller. The key updates are the move to PCIe Gen5 and the use of SK hynix's 238L TLC NAND. Other details are scarce, and we have reached out for additional information.
| SK hynix Platinum P51 Gen5 NVMe SSD Specifications | ||||
| Capacity | 500 GB | 1 TB | 2 TB | |
| Controller | SK hynix In-House (Alistar) | |||
| NAND Flash | SK hynix 238L 3D TLC NAND at ?? MT/s ('4D' with CMOS circuitry under the NAND as per SK hynix marketing) | |||
| Form-Factor, Interface | M.2-2280, PCIe 5.0 x4, NVMe 2.0 | |||
| Sequential Read | 13500 MB/s | |||
| Sequential Write | 11500 MB/s | |||
| Random Read IOPS | TBD | |||
| Random Write IOPS | TBD | |||
| SLC Caching | Yes | |||
| TCG Opal Encryption | TBD | |||
| Warranty | TBD | |||
| Write Endurance | TBD | TBD | TBD | |
Only the peak sequential access numbers were available at the GTC booth, indicating that the drive's firmware is still undergoing tweaks. It is also unclear how these numbers are going to vary based on capacity. Availability and pricing are also not public yet.
This is a significant launch for the Gen5 consumer SSD market, where the number of available options are quite limited. The Phison E26 controller and Micron's B58R NAND combination is already in its second generation (with the NAND operating at 2400 MT/s in the newest avatar), but other vertically integrated vendors such as Samsung, Western Digital / Kioxia, and SK hynix (till now) are focusing more on the Gen4 market which has much higher adoption.
We will update the piece with additional information once the specifications are officially available.
Storage
Posted by The Techinical Support
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Despite the divestment, Intel's past investment in Arm was likely driven by strategic considerations. Arm Holdings is a significant force in the semiconductor industry, with its designs powering most mobile devices, and, for obvious reasons, Intel would like to address these. Intel and Arm are also collaborating on datacenter platforms tailored for Intel's 18A process technology. Additionally, Arm might view Intel as a potential licensee for its technologies and a valuable partner for other companies that license Arm's designs.
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SK hynix to Build HBM4 in the U.S.
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Intel Sells Its Arm Shares, Reduces Stakes in Other Companies
Intel has divested its entire stake in Arm Holdings during the second quarter, raising approximately $147 million. Alongside this, Intel sold its stake in cybersecurity firm ZeroFox and reduced its holdings in Astera Labs, all as part of a broader effort to manage costs and recover cash amid significant financial challenges.
The sale of Intel's 1.18 million shares in Arm Holdings, as reported in a recent SEC filing, comes at a time when the company is struggling with substantial financial losses. Despite the $147 million generated from the sale, Intel reported a $120 million net loss on its equity investments for the quarter, which is a part of a larger $1.6 billion loss that Intel faced during this period.
In addition to selling its stake in Arm, Intel also exited its investment in ZeroFox and reduced its involvement with Astera Labs, a company known for developing connectivity platforms for enterprise hardware. These moves are in line with Intel's strategy to reduce costs and stabilize its financial position as it faces ongoing market challenges.
Despite the divestment, Intel's past investment in Arm was likely driven by strategic considerations. Arm Holdings is a significant force in the semiconductor industry, with its designs powering most mobile devices, and, for obvious reasons, Intel would like to address these. Intel and Arm are also collaborating on datacenter platforms tailored for Intel's 18A process technology. Additionally, Arm might view Intel as a potential licensee for its technologies and a valuable partner for other companies that license Arm's designs.
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Intel's financial struggles were highlighted earlier this month when the company released a disappointing earnings report, which led to a 33% drop in its stock value, erasing billions of dollars of capitalization. To counter these difficulties, Intel announced plans to cut 15,000 jobs and implement other expense reductions. The company has also suspended its dividend, signaling the depth of its efforts to conserve cash and focus on recovery. When it comes to divestment of Arm stock, the need for immediate financial stabilization has presumably taken precedence, leading to the decision.
CPUs
U.S. Signs $1.5B in CHIPS Act Agreements With Amkor and SKhynix for Chip Packaging Plants
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Amkor to Build Advanced Packaging Facility with Apple in Mind
Amkor plans to build a $2 billion advanced packaging facility near Peoria, Arizona, to test and assemble chips produced by TSMC at its Fab 21 near Phoenix, Arizona. The company signed a MOU that offers $400 million in direct funding and access to $200 million in loans under the CHIPS & Science Act. In addition, the company plans to take advantage of a 25% investment tax credit on eligible capital expenditures.
Set to be strategically positioned near TSMC's upcoming Fab 21 complex in Arizona, Amkor's Peoria facility will occupy 55 acres and, when fully completed, will feature over 500,000 square feet (46,451 square meters) of cleanroom space, more than twice the size of Amkor's advanced packaging site in Vietnam. Although the company has not disclosed the exact capacity or the specific technologies the facility will support, it is expected to cater to a wide range of industries, including automotive, high-performance computing, and mobile technologies. This suggests the new plant will offer diverse packaging solutions, including traditional, 2.5D, and 3D technologies.
Amkor has collaborated extensively with Apple on the vision and initial setup of the Peoria facility, as Apple is slated to be the facility's first and largest customer, marking a significant commitment from the tech giant. This partnership highlights the importance of the new facility in reinforcing the U.S. semiconductor supply chain and positioning Amkor as a key partner for companies relying on TSMC's manufacturing capabilities. The project is expected to generate around 2,000 jobs and is scheduled to begin operations in 2027.
SK hynix to Build HBM4 in the U.S.
This week SK hynix also signed a preliminary agreement with the U.S. government to receive up to $450 million in direct funding and $500 million in loans to build an advanced memory packaging facility in West Lafayette, Indiana.
The proposed facility is scheduled to begin operations in 2028, which means that it will assemble HBM4 or HBM4E memory. Meanwhile, DRAM devices for high bandwidth memory (HBM) stacks will still be produced in South Korea. Nonetheless, packing finished HBM4/HBM4E in the U.S. and possibly integrating these memory modules with high-end processors is a big deal.
In addition to building its packaging plant, SK hynix plans to collaborate with Purdue University and other local research institutions to advance semiconductor technology and packaging innovations. This partnership is intended to bolster research and development in the region, positioning the facility as a hub for AI technology and skilled employment.
Semiconductors
The Endorfy Fortis 5 Dual Fan CPU Cooler Review: Towering Value Standard CPU coolers, while adequate for managing basic thermal loads, often fall short in terms of noise reduction and superior cooling efficiency. This limitation drives advanced users and system builders to seek aftermarket solutions tailored to their specific needs. The high-end aftermarket cooler market is highly competitive, with manufacturers striving to offer products with exceptional performance.
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Cases/Cooling/PSUs
Kioxia Demonstrates Optical Interface SSDs for Data Centers
A few years back, the Japanese government's New Energy and Industrial Technology Development Organization (NEDO ) allocated funding for the development of green datacenter technologies. With the aim to obtain up to 40% savings in overall power consumption, several Japanese companies have been developing an optical interface for their enterprise SSDs. And at this year's FMS, Kioxia had their optical interface on display.
For this demonstration, Kioxia took its existing CM7 enterprise SSD and created an optical interface for it. A PCIe card with on-board optics developed by Kyocera is installed in the server slot. An optical interface allows data transfer over long distances (it was 40m in the demo, but Kioxia promises lengths of up to 100m for the cable in the future). This allows the storage to be kept in a separate room with minimal cooling requirements compared to the rack with the CPUs and GPUs. Disaggregation of different server components will become an option as very high throughput interfaces such as PCIe 7.0 (with 128 GT/s rates) become available.
The demonstration of the optical SSD showed a slight loss in IOPS performance, but a significant advantage in the latency metric over the shipping enterprise SSD behind a copper network link. Obviously, there are advantages in wiring requirements and signal integrity maintenance with optical links.
Being a proof-of-concept demonstration, we do see the requirement for an industry-standard approach if this were to gain adoption among different datacenter vendors. The PCI-SIG optical workgroup will need to get its act together soon to create a standards-based approach to this problem.
Storage
Intel Sells Its Arm Shares, Reduces Stakes in Other Companies
Intel has divested its entire stake in Arm Holdings during the second quarter, raising approximately $147 million. Alongside this, Intel sold its stake in cybersecurity firm ZeroFox and reduced its holdings in Astera Labs, all as part of a broader effort to manage costs and recover cash amid significant financial challenges.
The sale of Intel's 1.18 million shares in Arm Holdings, as reported in a recent SEC filing, comes at a time when the company is struggling with substantial financial losses. Despite the $147 million generated from the sale, Intel reported a $120 million net loss on its equity investments for the quarter, which is a part of a larger $1.6 billion loss that Intel faced during this period.
In addition to selling its stake in Arm, Intel also exited its investment in ZeroFox and reduced its involvement with Astera Labs, a company known for developing connectivity platforms for enterprise hardware. These moves are in line with Intel's strategy to reduce costs and stabilize its financial position as it faces ongoing market challenges.
Despite the divestment, Intel's past investment in Arm was likely driven by strategic considerations. Arm Holdings is a significant force in the semiconductor industry, with its designs powering most mobile devices, and, for obvious reasons, Intel would like to address these. Intel and Arm are also collaborating on datacenter platforms tailored for Intel's 18A process technology. Additionally, Arm might view Intel as a potential licensee for its technologies and a valuable partner for other companies that license Arm's designs.
Intel's investment in Astera Labs was also a strategic one as the company probably wanted to secure steady supply of smart retimers, smart cable modems, and CXL memory controller, which are used in volumes in datacenters and Intel is certainly interested in selling as many datacenter CPUs as possible.
Intel's financial struggles were highlighted earlier this month when the company released a disappointing earnings report, which led to a 33% drop in its stock value, erasing billions of dollars of capitalization. To counter these difficulties, Intel announced plans to cut 15,000 jobs and implement other expense reductions. The company has also suspended its dividend, signaling the depth of its efforts to conserve cash and focus on recovery. When it comes to divestment of Arm stock, the need for immediate financial stabilization has presumably taken precedence, leading to the decision.
CPUs
Kioxia Demonstrates RAID Offload Scheme for NVMe Drives
At FMS 2024, Kioxia had a proof-of-concept demonstration of their proposed a new RAID offload methodology for enterprise SSDs. The impetus for this is quite clear: as SSDs get faster in each generation, RAID arrays have a major problem of maintaining (and scaling up) performance. Even in cases where the RAID operations are handled by a dedicated RAID card, a simple write request in, say, a RAID 5 array would involve two reads and two writes to different drives. In cases where there is no hardware acceleration, the data from the reads needs to travel all the way back to the CPU and main memory for further processing before the writes can be done.
Kioxia has proposed the use of the PCIe direct memory access feature along with the SSD controller's controller memory buffer (CMB) to avoid the movement of data up to the CPU and back. The required parity computation is done by an accelerator block resident within the SSD controller.
In Kioxia's PoC implementation, the DMA engine can access the entire host address space (including the peer SSD's BAR-mapped CMB), allowing it to receive and transfer data as required from neighboring SSDs on the bus. Kioxia noted that their offload PoC saw close to 50% reduction in CPU utilization and upwards of 90% reduction in system DRAM utilization compared to software RAID done on the CPU. The proposed offload scheme can also handle scrubbing operations without taking up the host CPU cycles for the parity computation task.
Kioxia has already taken steps to contribute these features to the NVM Express working group. If accepted, the proposed offload scheme will be part of a standard that could become widely available across multiple SSD vendors.
Storage
Kioxia Details BiCS 8 NAND at FMS 2024: 218 Layers With Superior Scaling
![](https://twitter.com/share?url=https://compbuddey.blogspot.com/2024/04/sk-hynix-platinum-p51-gen5-ssd-with_5.html&text=SK hynix Platinum P51 Gen5 SSD with 238L NAND Spotted at GTC <p align="center"><a href="https://www.anandtech.com/show/21313/sk-hynix-platinum-p51-gen5-ssd-with-238l-nand-spotted-at-gtc"><img src="https://images.anandtech.com/doci/21313/SKh_P51_GTC_575px.jpg" alt="" /></a></p><p><p>SK hynix is set to unveil their first Gen5 consumer NVMe SSD lineup shortly, based on the products at display in their GTC 2024 booth. The Platinum P51 M.2 2280 NVMe SSD will take over flagship duties from the <a href="https://www.anandtech.com/show/17393">Platinum P41</a> that has been serving the market for more than a year.</p>
<p>Similar to the Gold P31 and the Platinum P41, the Platinum P51 also uses an in-house SSD controller. The key updates are the move to PCIe Gen5 and the use of SK hynix's 238L TLC NAND. Other details are scarce, and we have reached out for additional information.</p>
<table>
<tbody>
<tr class="tgrey">
<td align="center" colspan="4" style="vertical-align:middle;">SK hynix Platinum P51 Gen5 NVMe SSD Specifications</td>
</tr>
<tr class="tlblue">
<td class="tlgrey" style="vertical-align:middle;">Capacity</td>
<td align="center" style="vertical-align:middle;">500 GB</td>
<td align="center" style="vertical-align:middle;">1 TB</td>
<td align="center" style="vertical-align:middle;">2 TB</td>
</tr>
<tr>
<td class="tlgrey">Controller</td>
<td align="center" colspan="3" rowspan="1">SK hynix In-House (Alistar)</td>
</tr>
<tr>
<td class="tlgrey">NAND Flash</td>
<td align="center" colspan="3" rowspan="1">SK hynix 238L 3D TLC NAND at ?? MT/s ('4D' with CMOS circuitry under the NAND as per SK hynix marketing)</td>
</tr>
<tr>
<td class="tlgrey">Form-Factor, Interface</td>
<td align="center" colspan="4" rowspan="1">M.2-2280, PCIe 5.0 x4, NVMe 2.0</td>
</tr>
<tr>
<td class="tlgrey">Sequential Read</td>
<td align="center" colspan="3" rowspan="1">13500 MB/s</td>
</tr>
<tr>
<td class="tlgrey">Sequential Write</td>
<td align="center" colspan="3" rowspan="1">11500 MB/s</td>
</tr>
<tr>
<td class="tlgrey">Random Read IOPS</td>
<td align="center" colspan="3" rowspan="1">TBD</td>
</tr>
<tr>
<td class="tlgrey">Random Write IOPS</td>
<td align="center" colspan="3" rowspan="1">TBD</td>
</tr>
<tr>
<td class="tlgrey">SLC Caching</td>
<td align="center" colspan="3" rowspan="1">Yes</td>
</tr>
<tr>
<td class="tlgrey">TCG Opal Encryption</td>
<td align="center" colspan="3" rowspan="1">TBD</td>
</tr>
<tr>
<td class="tlgrey">Warranty</td>
<td align="center" colspan="3" rowspan="1">TBD</td>
</tr>
<tr>
<td class="tlgrey">Write Endurance</td>
<td align="center">TBD</td>
<td align="center">TBD</td>
<td align="center">TBD</td>
</tr>
</tbody>
</table>
<p>Only the peak sequential access numbers were available at the GTC booth, indicating that the drive's firmware is still undergoing tweaks. It is also unclear how these numbers are going to vary based on capacity. Availability and pricing are also not public yet.</p>
<p align="center"><a href="https://www.anandtech.com/show/21313/sk-hynix-platinum-p51-gen5-ssd-with-238l-nand-spotted-at-gtc"><img alt="" src="https://images.anandtech.com/doci/21313/SKh_P51_GTC_Crop_575px.jpg" /></a></p>
<p>This is a significant launch for the Gen5 consumer SSD market, where the number of available options are quite limited. The Phison E26 controller and Micron's B58R NAND combination is already in its second generation (with the NAND operating at 2400 MT/s in the newest avatar), but other vertically integrated vendors such as Samsung, Western Digital / Kioxia, and SK hynix (till now) are focusing more on the Gen4 market which has much higher adoption.</p>
<p>We will update the piece with additional information once the specifications are officially available.</p>
</p> Storage){kind=link}
![](https://www.pinterest.com/pin/create/button/?url=https://compbuddey.blogspot.com/2024/04/sk-hynix-platinum-p51-gen5-ssd-with_5.html&media=https://lh3.googleusercontent.com/blogger_img_proxy/AEn0k_sJIZOskmu-4QEAKgxffUCaLYfrK73mzAAM98r-SnS-TsKA2BY_MMhrklqAMVI1_CG1vE5oG_OhpwiQYC3u_PcH1RgnlC8Lkzsr5mgfRuSro5kcLmoGOtiPxhaSCNtJdMo&description=SK hynix Platinum P51 Gen5 SSD with 238L NAND Spotted at GTC <p align="center"><a href="https://www.anandtech.com/show/21313/sk-hynix-platinum-p51-gen5-ssd-with-238l-nand-spotted-at-gtc"><img src="https://images.anandtech.com/doci/21313/SKh_P51_GTC_575px.jpg" alt="" /></a></p><p><p>SK hynix is set to unveil their first Gen5 consumer NVMe SSD lineup shortly, based on the products at display in their GTC 2024 booth. The Platinum P51 M.2 2280 NVMe SSD will take over flagship duties from the <a href="https://www.anandtech.com/show/17393">Platinum P41</a> that has been serving the market for more than a year.</p>
<p>Similar to the Gold P31 and the Platinum P41, the Platinum P51 also uses an in-house SSD controller. The key updates are the move to PCIe Gen5 and the use of SK hynix's 238L TLC NAND. Other details are scarce, and we have reached out for additional information.</p>
<table>
<tbody>
<tr class="tgrey">
<td align="center" colspan="4" style="vertical-align:middle;">SK hynix Platinum P51 Gen5 NVMe SSD Specifications</td>
</tr>
<tr class="tlblue">
<td class="tlgrey" style="vertical-align:middle;">Capacity</td>
<td align="center" style="vertical-align:middle;">500 GB</td>
<td align="center" style="vertical-align:middle;">1 TB</td>
<td align="center" style="vertical-align:middle;">2 TB</td>
</tr>
<tr>
<td class="tlgrey">Controller</td>
<td align="center" colspan="3" rowspan="1">SK hynix In-House (Alistar)</td>
</tr>
<tr>
<td class="tlgrey">NAND Flash</td>
<td align="center" colspan="3" rowspan="1">SK hynix 238L 3D TLC NAND at ?? MT/s ('4D' with CMOS circuitry under the NAND as per SK hynix marketing)</td>
</tr>
<tr>
<td class="tlgrey">Form-Factor, Interface</td>
<td align="center" colspan="4" rowspan="1">M.2-2280, PCIe 5.0 x4, NVMe 2.0</td>
</tr>
<tr>
<td class="tlgrey">Sequential Read</td>
<td align="center" colspan="3" rowspan="1">13500 MB/s</td>
</tr>
<tr>
<td class="tlgrey">Sequential Write</td>
<td align="center" colspan="3" rowspan="1">11500 MB/s</td>
</tr>
<tr>
<td class="tlgrey">Random Read IOPS</td>
<td align="center" colspan="3" rowspan="1">TBD</td>
</tr>
<tr>
<td class="tlgrey">Random Write IOPS</td>
<td align="center" colspan="3" rowspan="1">TBD</td>
</tr>
<tr>
<td class="tlgrey">SLC Caching</td>
<td align="center" colspan="3" rowspan="1">Yes</td>
</tr>
<tr>
<td class="tlgrey">TCG Opal Encryption</td>
<td align="center" colspan="3" rowspan="1">TBD</td>
</tr>
<tr>
<td class="tlgrey">Warranty</td>
<td align="center" colspan="3" rowspan="1">TBD</td>
</tr>
<tr>
<td class="tlgrey">Write Endurance</td>
<td align="center">TBD</td>
<td align="center">TBD</td>
<td align="center">TBD</td>
</tr>
</tbody>
</table>
<p>Only the peak sequential access numbers were available at the GTC booth, indicating that the drive's firmware is still undergoing tweaks. It is also unclear how these numbers are going to vary based on capacity. Availability and pricing are also not public yet.</p>
<p align="center"><a href="https://www.anandtech.com/show/21313/sk-hynix-platinum-p51-gen5-ssd-with-238l-nand-spotted-at-gtc"><img alt="" src="https://images.anandtech.com/doci/21313/SKh_P51_GTC_Crop_575px.jpg" /></a></p>
<p>This is a significant launch for the Gen5 consumer SSD market, where the number of available options are quite limited. The Phison E26 controller and Micron's B58R NAND combination is already in its second generation (with the NAND operating at 2400 MT/s in the newest avatar), but other vertically integrated vendors such as Samsung, Western Digital / Kioxia, and SK hynix (till now) are focusing more on the Gen4 market which has much higher adoption.</p>
<p>We will update the piece with additional information once the specifications are officially available.</p>
</p> Storage){kind=link}
![](https://web.whatsapp.com/send?text=SK hynix Platinum P51 Gen5 SSD with 238L NAND Spotted at GTC <p align="center"><a href="https://www.anandtech.com/show/21313/sk-hynix-platinum-p51-gen5-ssd-with-238l-nand-spotted-at-gtc"><img src="https://images.anandtech.com/doci/21313/SKh_P51_GTC_575px.jpg" alt="" /></a></p><p><p>SK hynix is set to unveil their first Gen5 consumer NVMe SSD lineup shortly, based on the products at display in their GTC 2024 booth. The Platinum P51 M.2 2280 NVMe SSD will take over flagship duties from the <a href="https://www.anandtech.com/show/17393">Platinum P41</a> that has been serving the market for more than a year.</p>
<p>Similar to the Gold P31 and the Platinum P41, the Platinum P51 also uses an in-house SSD controller. The key updates are the move to PCIe Gen5 and the use of SK hynix's 238L TLC NAND. Other details are scarce, and we have reached out for additional information.</p>
<table>
<tbody>
<tr class="tgrey">
<td align="center" colspan="4" style="vertical-align:middle;">SK hynix Platinum P51 Gen5 NVMe SSD Specifications</td>
</tr>
<tr class="tlblue">
<td class="tlgrey" style="vertical-align:middle;">Capacity</td>
<td align="center" style="vertical-align:middle;">500 GB</td>
<td align="center" style="vertical-align:middle;">1 TB</td>
<td align="center" style="vertical-align:middle;">2 TB</td>
</tr>
<tr>
<td class="tlgrey">Controller</td>
<td align="center" colspan="3" rowspan="1">SK hynix In-House (Alistar)</td>
</tr>
<tr>
<td class="tlgrey">NAND Flash</td>
<td align="center" colspan="3" rowspan="1">SK hynix 238L 3D TLC NAND at ?? MT/s ('4D' with CMOS circuitry under the NAND as per SK hynix marketing)</td>
</tr>
<tr>
<td class="tlgrey">Form-Factor, Interface</td>
<td align="center" colspan="4" rowspan="1">M.2-2280, PCIe 5.0 x4, NVMe 2.0</td>
</tr>
<tr>
<td class="tlgrey">Sequential Read</td>
<td align="center" colspan="3" rowspan="1">13500 MB/s</td>
</tr>
<tr>
<td class="tlgrey">Sequential Write</td>
<td align="center" colspan="3" rowspan="1">11500 MB/s</td>
</tr>
<tr>
<td class="tlgrey">Random Read IOPS</td>
<td align="center" colspan="3" rowspan="1">TBD</td>
</tr>
<tr>
<td class="tlgrey">Random Write IOPS</td>
<td align="center" colspan="3" rowspan="1">TBD</td>
</tr>
<tr>
<td class="tlgrey">SLC Caching</td>
<td align="center" colspan="3" rowspan="1">Yes</td>
</tr>
<tr>
<td class="tlgrey">TCG Opal Encryption</td>
<td align="center" colspan="3" rowspan="1">TBD</td>
</tr>
<tr>
<td class="tlgrey">Warranty</td>
<td align="center" colspan="3" rowspan="1">TBD</td>
</tr>
<tr>
<td class="tlgrey">Write Endurance</td>
<td align="center">TBD</td>
<td align="center">TBD</td>
<td align="center">TBD</td>
</tr>
</tbody>
</table>
<p>Only the peak sequential access numbers were available at the GTC booth, indicating that the drive's firmware is still undergoing tweaks. It is also unclear how these numbers are going to vary based on capacity. Availability and pricing are also not public yet.</p>
<p align="center"><a href="https://www.anandtech.com/show/21313/sk-hynix-platinum-p51-gen5-ssd-with-238l-nand-spotted-at-gtc"><img alt="" src="https://images.anandtech.com/doci/21313/SKh_P51_GTC_Crop_575px.jpg" /></a></p>
<p>This is a significant launch for the Gen5 consumer SSD market, where the number of available options are quite limited. The Phison E26 controller and Micron's B58R NAND combination is already in its second generation (with the NAND operating at 2400 MT/s in the newest avatar), but other vertically integrated vendors such as Samsung, Western Digital / Kioxia, and SK hynix (till now) are focusing more on the Gen4 market which has much higher adoption.</p>
<p>We will update the piece with additional information once the specifications are officially available.</p>
</p> Storage | https://compbuddey.blogspot.com/2024/04/sk-hynix-platinum-p51-gen5-ssd-with_5.html){kind=link}
![](mailto:?subject=SK hynix Platinum P51 Gen5 SSD with 238L NAND Spotted at GTC <p align="center"><a href="https://www.anandtech.com/show/21313/sk-hynix-platinum-p51-gen5-ssd-with-238l-nand-spotted-at-gtc"><img src="https://images.anandtech.com/doci/21313/SKh_P51_GTC_575px.jpg" alt="" /></a></p><p><p>SK hynix is set to unveil their first Gen5 consumer NVMe SSD lineup shortly, based on the products at display in their GTC 2024 booth. The Platinum P51 M.2 2280 NVMe SSD will take over flagship duties from the <a href="https://www.anandtech.com/show/17393">Platinum P41</a> that has been serving the market for more than a year.</p>
<p>Similar to the Gold P31 and the Platinum P41, the Platinum P51 also uses an in-house SSD controller. The key updates are the move to PCIe Gen5 and the use of SK hynix's 238L TLC NAND. Other details are scarce, and we have reached out for additional information.</p>
<table>
<tbody>
<tr class="tgrey">
<td align="center" colspan="4" style="vertical-align:middle;">SK hynix Platinum P51 Gen5 NVMe SSD Specifications</td>
</tr>
<tr class="tlblue">
<td class="tlgrey" style="vertical-align:middle;">Capacity</td>
<td align="center" style="vertical-align:middle;">500 GB</td>
<td align="center" style="vertical-align:middle;">1 TB</td>
<td align="center" style="vertical-align:middle;">2 TB</td>
</tr>
<tr>
<td class="tlgrey">Controller</td>
<td align="center" colspan="3" rowspan="1">SK hynix In-House (Alistar)</td>
</tr>
<tr>
<td class="tlgrey">NAND Flash</td>
<td align="center" colspan="3" rowspan="1">SK hynix 238L 3D TLC NAND at ?? MT/s ('4D' with CMOS circuitry under the NAND as per SK hynix marketing)</td>
</tr>
<tr>
<td class="tlgrey">Form-Factor, Interface</td>
<td align="center" colspan="4" rowspan="1">M.2-2280, PCIe 5.0 x4, NVMe 2.0</td>
</tr>
<tr>
<td class="tlgrey">Sequential Read</td>
<td align="center" colspan="3" rowspan="1">13500 MB/s</td>
</tr>
<tr>
<td class="tlgrey">Sequential Write</td>
<td align="center" colspan="3" rowspan="1">11500 MB/s</td>
</tr>
<tr>
<td class="tlgrey">Random Read IOPS</td>
<td align="center" colspan="3" rowspan="1">TBD</td>
</tr>
<tr>
<td class="tlgrey">Random Write IOPS</td>
<td align="center" colspan="3" rowspan="1">TBD</td>
</tr>
<tr>
<td class="tlgrey">SLC Caching</td>
<td align="center" colspan="3" rowspan="1">Yes</td>
</tr>
<tr>
<td class="tlgrey">TCG Opal Encryption</td>
<td align="center" colspan="3" rowspan="1">TBD</td>
</tr>
<tr>
<td class="tlgrey">Warranty</td>
<td align="center" colspan="3" rowspan="1">TBD</td>
</tr>
<tr>
<td class="tlgrey">Write Endurance</td>
<td align="center">TBD</td>
<td align="center">TBD</td>
<td align="center">TBD</td>
</tr>
</tbody>
</table>
<p>Only the peak sequential access numbers were available at the GTC booth, indicating that the drive's firmware is still undergoing tweaks. It is also unclear how these numbers are going to vary based on capacity. Availability and pricing are also not public yet.</p>
<p align="center"><a href="https://www.anandtech.com/show/21313/sk-hynix-platinum-p51-gen5-ssd-with-238l-nand-spotted-at-gtc"><img alt="" src="https://images.anandtech.com/doci/21313/SKh_P51_GTC_Crop_575px.jpg" /></a></p>
<p>This is a significant launch for the Gen5 consumer SSD market, where the number of available options are quite limited. The Phison E26 controller and Micron's B58R NAND combination is already in its second generation (with the NAND operating at 2400 MT/s in the newest avatar), but other vertically integrated vendors such as Samsung, Western Digital / Kioxia, and SK hynix (till now) are focusing more on the Gen4 market which has much higher adoption.</p>
<p>We will update the piece with additional information once the specifications are officially available.</p>
</p> Storage&body=https://compbuddey.blogspot.com/2024/04/sk-hynix-platinum-p51-gen5-ssd-with_5.html){kind=link}
Kioxia's booth at FMS 2024 was a busy one with multiple technology demonstrations keeping visitors occupied. A walk-through of the BiCS 8 manufacturing process was the first to grab my attention. Kioxia and Western Digital announced the sampling of BiCS 8 in March 2023. We had touched briefly upon its CMOS Bonded Array (CBA) scheme in our coverage of Kioxial's 2Tb QLC NAND device and coverage of Western Digital's 128 TB QLC enterprise SSD proof-of-concept demonstration. At Kioxia's booth, we got more insights.
Traditionally, fabrication of flash chips involved placement of the associate logic circuitry (CMOS process) around the periphery of the flash array. The process then moved on to putting the CMOS under the cell array, but the wafer development process was serialized with the CMOS logic getting fabricated first followed by the cell array on top. However, this has some challenges because the cell array requires a high-temperature processing step to ensure higher reliability that can be detrimental to the health of the CMOS logic. Thanks to recent advancements in wafer bonding techniques, the new CBA process allows the CMOS wafer and cell array wafer to be processed independently in parallel and then pieced together, as shown in the models above.
The BiCS 8 3D NAND incorporates 218 layers, compared to 112 layers in BiCS 5 and 162 layers in BiCS 6. The company decided to skip over BiCS 7 (or, rather, it was probably a short-lived generation meant as an internal test vehicle). The generation retains the four-plane charge trap structure of BiCS 6. In its TLC avatar, it is available as a 1 Tbit device. The QLC version is available in two capacities - 1 Tbit and 2 Tbit.
Kioxia also noted that while the number of layers (218) doesn't compare favorably with the latest layer counts from the competition, its lateral scaling / cell shrinkage has enabled it to be competitive in terms of bit density as well as operating speeds (3200 MT/s). For reference, the latest shipping NAND from Micron - the G9 - has 276 layers with a bit density in TLC mode of 21 Gbit/mm2, and operates at up to 3600 MT/s. However, its 232L NAND operates only up to 2400 MT/s and has a bit density of 14.6 Gbit/mm2.
It must be noted that the CBA hybrid bonding process has advantages over the current processes used by other vendors - including Micron's CMOS under array (CuA) and SK hynix's 4D PUC (periphery-under-chip) developed in the late 2010s. It is expected that other NAND vendors will also move eventually to some variant of the hybrid bonding scheme used by Kioxia.
Storage
Microchip Demonstrates Flashtec 5016 Enterprise SSD Controller
Microchip recently announced the availability of their second PCIe Gen 5 enterprise SSD controller - the Flashtec 5016. Like the 4016, this is also a 16-channel controller, but there are some key updates:
- PCIe 5.0 lane organization: Operation in x4 or dual independent x2 / x2 mode in the 5016, compared to the x8, or x4, or dual independent x4 / x2 mode in the 4016.
- DRAM support: Four ranks of DDR5-5200 in the 5016, compared to two ranks of DDR4-3200 in the 4016.
- Extended NAND support: 2400 MT/s NAND in the 4016, compared to the 3200 MT/s NAND support in the 5016.
- Performance improvements: The 5016 is capable of delivering 3.5M+ random read IOPS compared to the 3M+ of the 4016.
Microchip's enterprise SSD controllers provide a high level of flexibility to SSD vendors by providing them with significant horsepower and accelerators. The 5016 includes Cortex-A53 cores for SSD vendors to run custom applications relevant to SSD management. However, compared to the Gen4 controllers, there are two additional cores in the CPU cluster. The DRAM subsystem includes ECC support (both out-of-band and inline, as desired by the SSD vendor).
At FMS 2024, the company demonstrated an application of the neural network engines embedded in the Gen5 controllers. Controllers usually employ a 'read-retry' operation with altered read-out voltages for flash reads that do not complete successfully. Microchip implemented a machine learning approach to determine the read-out voltage based on the health history of the NAND block using the NN engines in the controller. This approach delivers tangible benefits for read latency and power consumption (thanks to a smaller number of errors on the first read).
The 4016 and 5016 come with a single-chip root of trust implementation for hardware security. A secure boot process with dual-signature authentication ensures that the controller firmware is not maliciously altered in the field. The company also brought out the advantages of their controller's implementation of SR-IOV, flexible data placement, and zoned namespaces along with their 'credit engine' scheme for multi-tenant cloud workloads. These aspects were also brought out in other demonstrations.
Microchip's press release included quotes from the usual NAND vendors - Solidigm, Kioxia, and Micron. On the customer front, Longsys has been using Flashtec controllers in their enterprise offerings along with YMTC NAND. It is likely that this collaboration will continue further using the new 5016 controller.
Storage
Lorem Ipsum is simply dummy text of the printing and typesetting industry. Lorem Ipsum has been the industry's.
The Endorfy Fortis 5 Dual Fan CPU Cooler Review: Towering Value Standard CPU coolers, while adequate for managing basic thermal loads, often fall short in terms of noise reduction and superior cooling efficiency. This limitation drives advanced users and system builders to seek aftermarket solutions tailored to their specific needs. The high-end aftermarket cooler market is highly competitive, with manufacturers striving to offer products with exceptional performance.
Endorfy, previously known as SilentiumPC, is a Polish manufacturer that has undergone a significant transformation to expand its presence in global markets. The brand is known for delivering high-performance cooling solutions with a strong focus on balancing efficiency and affordability. By rebranding as Endorfy, the company aims to enter premium market segments while continuing to offer reliable, high-quality cooling products.
SilentiumPC became very popular in the value/mainstream segments of the PC market with their products, the spearhead of which probably was the Fera 5 cooler that we reviewed a little over two years ago and had a remarkable value for money. Today’s review places Endorfy’s largest CPU cooler, the Fortis 5 Dual Fan, on our laboratory test bench. The Fortis 5 is the largest CPU air cooler the company currently offers and is significantly more expensive than the Fera 5, yet it still is a single-tower cooler that strives to strike a balance between value, compatibility, and performance.
Cases/Cooling/PSUs
Intel Sells Its Arm Shares, Reduces Stakes in Other Companies
Intel has divested its entire stake in Arm Holdings during the second quarter, raising approximately $147 million. Alongside this, Intel sold its stake in cybersecurity firm ZeroFox and reduced its holdings in Astera Labs, all as part of a broader effort to manage costs and recover cash amid significant financial challenges.
The sale of Intel's 1.18 million shares in Arm Holdings, as reported in a recent SEC filing, comes at a time when the company is struggling with substantial financial losses. Despite the $147 million generated from the sale, Intel reported a $120 million net loss on its equity investments for the quarter, which is a part of a larger $1.6 billion loss that Intel faced during this period.
In addition to selling its stake in Arm, Intel also exited its investment in ZeroFox and reduced its involvement with Astera Labs, a company known for developing connectivity platforms for enterprise hardware. These moves are in line with Intel's strategy to reduce costs and stabilize its financial position as it faces ongoing market challenges.
Despite the divestment, Intel's past investment in Arm was likely driven by strategic considerations. Arm Holdings is a significant force in the semiconductor industry, with its designs powering most mobile devices, and, for obvious reasons, Intel would like to address these. Intel and Arm are also collaborating on datacenter platforms tailored for Intel's 18A process technology. Additionally, Arm might view Intel as a potential licensee for its technologies and a valuable partner for other companies that license Arm's designs.
Intel's investment in Astera Labs was also a strategic one as the company probably wanted to secure steady supply of smart retimers, smart cable modems, and CXL memory controller, which are used in volumes in datacenters and Intel is certainly interested in selling as many datacenter CPUs as possible.
Intel's financial struggles were highlighted earlier this month when the company released a disappointing earnings report, which led to a 33% drop in its stock value, erasing billions of dollars of capitalization. To counter these difficulties, Intel announced plans to cut 15,000 jobs and implement other expense reductions. The company has also suspended its dividend, signaling the depth of its efforts to conserve cash and focus on recovery. When it comes to divestment of Arm stock, the need for immediate financial stabilization has presumably taken precedence, leading to the decision.
CPUs
U.S. Signs $1.5B in CHIPS Act Agreements With Amkor and SKhynix for Chip Packaging Plants
Under the CHIPS & Science Act, the U.S. government provided tens of billions of dollars in grants and loans to the world's leading maker of chips, such as Intel, Samsung, and TSMC, which will significantly expand the country's semiconductor production industry in the coming years. However, most chips are typically tested, assembled, and packaged in Asia, which has left the American supply chain incomplete. Addressing this last gap in the government's domestic chip production plans, these past couple of weeks the U.S. government signed memorandums of understanding worth about $1.5 billion with Amkor and SK hynix to support their efforts to build chip packaging facilities in the U.S.
Amkor to Build Advanced Packaging Facility with Apple in Mind
Amkor plans to build a $2 billion advanced packaging facility near Peoria, Arizona, to test and assemble chips produced by TSMC at its Fab 21 near Phoenix, Arizona. The company signed a MOU that offers $400 million in direct funding and access to $200 million in loans under the CHIPS & Science Act. In addition, the company plans to take advantage of a 25% investment tax credit on eligible capital expenditures.
Set to be strategically positioned near TSMC's upcoming Fab 21 complex in Arizona, Amkor's Peoria facility will occupy 55 acres and, when fully completed, will feature over 500,000 square feet (46,451 square meters) of cleanroom space, more than twice the size of Amkor's advanced packaging site in Vietnam. Although the company has not disclosed the exact capacity or the specific technologies the facility will support, it is expected to cater to a wide range of industries, including automotive, high-performance computing, and mobile technologies. This suggests the new plant will offer diverse packaging solutions, including traditional, 2.5D, and 3D technologies.
Amkor has collaborated extensively with Apple on the vision and initial setup of the Peoria facility, as Apple is slated to be the facility's first and largest customer, marking a significant commitment from the tech giant. This partnership highlights the importance of the new facility in reinforcing the U.S. semiconductor supply chain and positioning Amkor as a key partner for companies relying on TSMC's manufacturing capabilities. The project is expected to generate around 2,000 jobs and is scheduled to begin operations in 2027.
SK hynix to Build HBM4 in the U.S.
This week SK hynix also signed a preliminary agreement with the U.S. government to receive up to $450 million in direct funding and $500 million in loans to build an advanced memory packaging facility in West Lafayette, Indiana.
The proposed facility is scheduled to begin operations in 2028, which means that it will assemble HBM4 or HBM4E memory. Meanwhile, DRAM devices for high bandwidth memory (HBM) stacks will still be produced in South Korea. Nonetheless, packing finished HBM4/HBM4E in the U.S. and possibly integrating these memory modules with high-end processors is a big deal.
In addition to building its packaging plant, SK hynix plans to collaborate with Purdue University and other local research institutions to advance semiconductor technology and packaging innovations. This partnership is intended to bolster research and development in the region, positioning the facility as a hub for AI technology and skilled employment.
Semiconductors
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