Best Buy Briefly Lists AMD's Ryzen 9000 CPUs: From $279 to $599
Although AMD delayed launch of its Ryzen 9000-series processors based on the Zen 5 microarchitecture from July 31, to early and mid-August, the company's partner (and major US retailer) Best Buy briefly began listing the new CPUs today, revealing a very plausible set of launch prices. As per the retailer's product catalog, the most affordable unlocked Zen 5-based processor will cost $279, whereas the highest-performing Zen 5-powered CPU will cost $599 at launch.
AMD will start its Ryzen 9000 series rollout from relatively inexpensive six-core Ryzen 5 9600X and eight-core Ryzen 7 9700X on August 8. Per the Best Buy listing, the Ryzen 5 9600X will cost $279, whereas the Ryzen 7 9700X will carry a recommended price tag of $359. Meanwhile, The more advanced 12-core Ryzen 9 9900X and 16-core Ryzen 9 9950X will hit the market on August 15 at MSRPs of $449 and $599, respectively, based on the Best Buy listing.
| AMD Ryzen 9000 Series Processors Zen 5 Microarchitecture (Granite Ridge) |
|||||||
| AnandTech | Cores / Threads |
Base Freq |
Turbo Freq |
L2 Cache |
L3 Cache |
TDP | MSRP |
| Ryzen 9 9950X | 16C / 32T | 4.3GHz | 5.7GHz | 16 MB | 64 MB | 170 W | $599 |
| Ryzen 9 9900X | 12C / 24T | 4.4GHz | 5.6GHz | 12 MB | 64 MB | 120 W | $449 |
| Ryzen 7 9700X | 8C / 16T | 3.8GHz | 5.5GHz | 8 MB | 32 MB | 65 W | $359 |
| Ryzen 5 9600X | 6C / 12T | 3.9GHz | 5.4GHz | 6 MB | 32 MB | 65 W | $279 |
It is noteworthy that when compared to the launch prices of the Zen 4-based Ryzen 7000 processors, the new Zen 5-powered Ryzen 9000 CPUs come in cheaper. The range topping Ryzen 9 5950X started at $799 in 2020, while the Ryzen 9 7950X had a recommended $699 price tag in 2022. By contrast, the top-end Ryzen 9 9950X is listed at $599. Both Ryzen 7 5600X and Ryzen 7 7600X cost $299 at launch, while the upcoming Ryzen 5 9600X will apparently be priced at $279 at launch.
As always with accidental retailer listings, it should be emphasized that AMD has not yet announced official pricing for their Ryzen 9000 CPUs. Given Best Buy's status as one of the largest US electronics retailers, these prices carry a very high probability of being accurate; but none the less, they should be taken with a grain of salt – if only because last-minute price changes are not unheard of with new CPU launches.
Source: Best Buy (via @momomo_us)
CPUs
Posted by The Techinical Support
PCIe 7.0 Draft 0.5 Spec Available: 512 GB/s over PCIe x16 On Track For 2025 
PCI-SIG this week released version 0.5 of the PCI-Express 7.0 specification to its members. This is the second draft of the spec and the final call for PCI-SIG members to submit their new features to the standard. The latest update on the development of the specification comes a couple months shy of a year after the PCI-SIG published the initial Draft 0.3 specificaiton, with the PCI-SIG using the latest update to reiterate that development of the new standard remains on-track for a final release in 2025.
PCIe 7.0 is is the next generation interconnect technology for computers that is set to increase data transfer speeds to 128 GT/s per pin, doubling the 64 GT/s of PCIe 6.0 and quadrupling the 32 GT/s of PCIe 5.0. This would allow a 16-lane (x16) connection to support 256 GB/sec of bandwidth in each direction simultaneously, excluding encoding overhead. Such speeds will be handy for future datacenters as well as artificial intelligence and high-performance computing applications that will need even faster data transfer rates, including network data transfer rates.
To achieve its impressive data transfer rates, PCIe 7.0 doubles the bus frequency at the physical layer compared to PCIe 5.0 and 6.0. Otherwise, the standard retains pulse amplitude modulation with four level signaling (PAM4), 1b/1b FLIT mode encoding, and the forward error correction (FEC) technologies that are already used for PCIe 6.0. Otherwise, PCI-SIG says that the PCIe 7.0 speicification also focuses on enhanced channel parameters and reach as well as improved power efficiency.
Overall, the engineers behind the standard have their work cut out for them, given that PCIe 7.0 requires doubling the bus frequency at the physical layer, a major development that PCIe 6.0 sidestepped with PAM4 signaling. Nothing comes for free in regards to improving data signaling, and with PCIe 7.0, the PCI-SIG is arguably back to hard-mode development by needing to improve the physical layer once more – this time to enable it to run at around 30GHz. Though how much of this heavy lifting will be accomplished through smart signaling (and retimers) and how much will be accomplished through sheer materials improvements, such as thicker printed circuit boards (PCBs) and low-loss materials, remains to be seen.
The next major step for PCIe 7.0 is finalization of the version 0.7 of specification, which is considered the Complete Draft, where all aspects must be fully defined, and electrical specifications must be validated through test chips. After this iteration of the specification is released, no new features can be added. PCIe 6.0 eventually went through 4 major drafts – 0.3, 0.5, 0.7, and 0.9 – before finally being finalized, so PCIe 7.0 is likely on the same track.
Once finalized in 2025, it should take a few years for the first PCIe 7.0 hardware to hit the shelves. Although development work on controller IP and initial hardware is already underway, that process extends well beyond the release of the final PCIe specification.
CPUs
Western Digital Introduces 4 TB microSDUC, 8 TB SDUC, and 16 TB External SSDs 
Western Digital's BiCS8 218-layer 3D NAND is being put to good use in a wide range of client and enterprise platforms, including WD's upcoming Gen 5 client SSDs and 128 TB-class datacenter SSD. On the external storage front, the company demonstrated four different products: for card-based media, 4 TB microSDUC and 8 TB SDUC cards with UHS-I speeds, and on the portable SSD front we had two 16 TB drives. One will be a SanDisk Desk Drive with external power, and the other in the SanDisk Extreme Pro housing with a lanyard opening in the case.
All of these are using BiCS8 QLC NAND, though I did hear booth talk (as I was taking leave) that they were not supposed to divulge the use of QLC in these products. The 4 TB microSDUC and 8 TB SDUC cards are rated for UHS-I speeds. They are being marketed under the SanDisk Ultra branding.
The SanDisk Desk Drive is an external SSD with a 18W power adapter, and it has been in the market for a few months now. Initially launched in capacities up to 8 TB, Western Digital had promised a 16 TB version before the end of the year. It appears that the product is coming to retail quite soon. One aspect to note is that this drive has been using TLC for the SKUs that are currently in the market, so it appears unlikely that the 16 TB version would be QLC. The units (at least up to the 8 TB capacity point) come with two SN850XE drives. Given the recent introduction of the 8 TB SN850X, an 'E' version with tweaked firmware is likely to be present in the 16 TB Desk Drive.
The 16 TB portable SSD in the SanDisk Extreme housing was a technology demonstration. It is definitely the highest capacity bus-powered portable SSD demonstrated by any vendor at any trade show thus far. Given the 16 TB Desk Drive's imminent market introduction, it is just a matter of time before the technology demonstration of the bus-powered version becomes a retail reality.
Storage
Samsung's 128 TB-Class BM1743 Enterprise SSD Displayed at FMS 2024 
Samsung had quietly launched its BM1743 enterprise QLC SSD last month with a hefty 61.44 TB SKU. At FMS 2024, the company had the even larger 122.88 TB version of that SSD on display, alongside a few recorded benchmarking sessions. Compared to the previous generation, the BM1743 comes with a 4.1x improvement in I/O performance, improvement in data retention, and a 45% improvement in power efficiency for sequential writes.
The 128 TB-class QLC SSD boasts of sequential read speeds of 7.5 GBps and write speeds of 3 GBps. Random reads come in at 1.6 M IOPS, while 16 KB random writes clock in at 45K IOPS. Based on the quoted random write access granularity, it appears that Samsung is using a 16 KB indirection unit (IU) to optimize flash management. This is similar to the strategy adopted by Solidigm with IUs larger than 4K in their high-capacity SSDs.
A recorded benchmark session on the company's PM9D3a 8-channel Gen 5 SSD was also on display.
The SSD family is being promoted as a mainstream option for datacenters, and boasts of sequential reads up to 12 GBps and writes up to 6.8 GBps. Random reads clock in at 2 M IOPS, and random writes at 400 K IOPS.
Available in multiple form-factors up to 32 TB (M.2 tops out at 2 TB), the drive's firmware includes optional support for flexible data placement (FDP) to help address the write amplification aspect.
The PM1753 is the current enterprise SSD flagship in Samsung's lineup. With support for 16 NAND channels and capacities up to 32 TB, this U.2 / E3.S SSD has advertised sequential read and write speeds of 14.8 GBps and 11 GBps respectively. Random reads and writes for 4 KB accesses are listed at 3.4 M and 600 K IOPS.
Samsung claims a 1.7x performance improvement and a 1.7x power efficiency improvement over the previous generation (PM1743), making this TLC SSD suitable for AI servers.
The 9th Gen. V-NAND wafer was also available for viewing, though photography was prohibited. Mass production of this flash memory began in April 2024.
Storage
![Rapidus Wants to Offer Fully Automated Packaging for 2nm Fab to Cut Chip Lead Times <p align="center"><a href="https://www.anandtech.com/show/21525/rapidus-2nm-fully-automated-chip-packaging-to-cut-lead-times"><img src="https://images.anandtech.com/doci/21525/intel-foundry-wafer-semiconductor-fab-ifs-678_575px.jpg" alt="" /></a></p><p><p>One of the core challenges that Rapidus will face when it kicks off volume production of chips on its 2nm-class process technology in 2027 is lining up customers. With Intel, Samsung, and TSMC all slated to offer their own 2nm-class nodes by that time, Rapidus will need some kind of advantage to attract customers away from its more established rivals. To that end, the company thinks they've found their edge: fully automated packaging that will allow for shorter chip lead times than manned packaging operations.</p>
<p>In an interview with <a href="https://asia.nikkei.com/Editor-s-Picks/Interview/Japan-s-Rapidus-to-fully-automate-2-nm-chip-fab-president-says">Nikkei</a>, Rapidus' president, Atsuyoshi Koike, outlined the company's vision to use advanced packaging as a competitive edge for the new fab. <a href="https://www.anandtech.com/show/21411/rapidus-adds-chip-packaging-services-to-plans-for-32b-2nm-fab">The Hokkaido facility</a>, which is currently under construction and is expecting to begin equipment installation this December, is already slated to both produce chips and offer advanced packaging services within the same facility, an industry first. But ultimately, Rapidus biggest plan to differentiate itself is by automating the back-end fab processes (chip packaging) to provide significantly faster turnaround times.</p>
<p>Rapidus is targetting back-end production in particular as, compared to front-end (lithography) production, back-end production still heavily relies on human labor. No other advanced packaging fab has fully automated the process thus far, which provides for a degree of flexibility, but slows throughput. But with automation in place to handle this aspect of chip production, Rapidus would be able to increase chip packaging efficiency and speed, which is crucial as chip assembly tasks become more complex. Rapidus is also collaborating with multiple Japanese suppliers to source materials for back-end production. </p>
<p>"In the past, Japanese chipmakers tried to keep their technology development exclusively in-house, which pushed up development costs and made them less competitive," Koike told Nikkei. "[Rapidus plans to] open up technology that should be standardized, bringing down costs, while handling important technology in-house." </p>
<p>Financially, Rapidus faces a significant challenge, needing a total of ¥5 trillion ($35 billion) by the time mass production starts in 2027. The company estimates that ¥2 trillion will be required by 2025 for prototype production. While the Japanese government has provided ¥920 billion in aid, Rapidus still needs to secure substantial funding from private investors.</p>
<p>Due to its lack of track record and experience of chip production as. well as limited visibility for success, Rapidus is finding it difficult to attract private financing. The company is in discussions with the government to make it easier to raise capital, including potential loan guarantees, and is hopeful that new legislation will assist in this effort.</p>
</p> Semiconductors](https://lh3.googleusercontent.com/blogger_img_proxy/AEn0k_uuSmucCA8MI8vRb-y4cbVsMHLn5XhRD80UauHGWhLUfwZCO7JdRMt-5eiE3kVTSl7891AYye-Ai0ZMkpoH5W1TIhZXYxMO4n-GBs7DM3bRcnEq3W_tgiI9JVTzPierA0nO9n4YTzFBRXvPTm8J-W_lX8M6fuiDBLHy_tHlux-bY_r2=w72-h72-p-k-no-nu)
Rapidus Wants to Offer Fully Automated Packaging for 2nm Fab to Cut Chip Lead Times 
One of the core challenges that Rapidus will face when it kicks off volume production of chips on its 2nm-class process technology in 2027 is lining up customers. With Intel, Samsung, and TSMC all slated to offer their own 2nm-class nodes by that time, Rapidus will need some kind of advantage to attract customers away from its more established rivals. To that end, the company thinks they've found their edge: fully automated packaging that will allow for shorter chip lead times than manned packaging operations.
In an interview with Nikkei, Rapidus' president, Atsuyoshi Koike, outlined the company's vision to use advanced packaging as a competitive edge for the new fab. The Hokkaido facility, which is currently under construction and is expecting to begin equipment installation this December, is already slated to both produce chips and offer advanced packaging services within the same facility, an industry first. But ultimately, Rapidus biggest plan to differentiate itself is by automating the back-end fab processes (chip packaging) to provide significantly faster turnaround times.
Rapidus is targetting back-end production in particular as, compared to front-end (lithography) production, back-end production still heavily relies on human labor. No other advanced packaging fab has fully automated the process thus far, which provides for a degree of flexibility, but slows throughput. But with automation in place to handle this aspect of chip production, Rapidus would be able to increase chip packaging efficiency and speed, which is crucial as chip assembly tasks become more complex. Rapidus is also collaborating with multiple Japanese suppliers to source materials for back-end production.
"In the past, Japanese chipmakers tried to keep their technology development exclusively in-house, which pushed up development costs and made them less competitive," Koike told Nikkei. "[Rapidus plans to] open up technology that should be standardized, bringing down costs, while handling important technology in-house."
Financially, Rapidus faces a significant challenge, needing a total of ¥5 trillion ($35 billion) by the time mass production starts in 2027. The company estimates that ¥2 trillion will be required by 2025 for prototype production. While the Japanese government has provided ¥920 billion in aid, Rapidus still needs to secure substantial funding from private investors.
Due to its lack of track record and experience of chip production as. well as limited visibility for success, Rapidus is finding it difficult to attract private financing. The company is in discussions with the government to make it easier to raise capital, including potential loan guarantees, and is hopeful that new legislation will assist in this effort.
Semiconductors
PCIe 7.0 Draft 0.5 Spec Available: 512 GB/s over PCIe x16 On Track For 2025
PCI-SIG this week released version 0.5 of the PCI-Express 7.0 specification to its members. This is the second draft of the spec and the final call for PCI-SIG members to submit their new features to the standard. The latest update on the development of the specification comes a couple months shy of a year after the PCI-SIG published the initial Draft 0.3 specificaiton, with the PCI-SIG using the latest update to reiterate that development of the new standard remains on-track for a final release in 2025.
PCIe 7.0 is is the next generation interconnect technology for computers that is set to increase data transfer speeds to 128 GT/s per pin, doubling the 64 GT/s of PCIe 6.0 and quadrupling the 32 GT/s of PCIe 5.0. This would allow a 16-lane (x16) connection to support 256 GB/sec of bandwidth in each direction simultaneously, excluding encoding overhead. Such speeds will be handy for future datacenters as well as artificial intelligence and high-performance computing applications that will need even faster data transfer rates, including network data transfer rates.
To achieve its impressive data transfer rates, PCIe 7.0 doubles the bus frequency at the physical layer compared to PCIe 5.0 and 6.0. Otherwise, the standard retains pulse amplitude modulation with four level signaling (PAM4), 1b/1b FLIT mode encoding, and the forward error correction (FEC) technologies that are already used for PCIe 6.0. Otherwise, PCI-SIG says that the PCIe 7.0 speicification also focuses on enhanced channel parameters and reach as well as improved power efficiency.
Overall, the engineers behind the standard have their work cut out for them, given that PCIe 7.0 requires doubling the bus frequency at the physical layer, a major development that PCIe 6.0 sidestepped with PAM4 signaling. Nothing comes for free in regards to improving data signaling, and with PCIe 7.0, the PCI-SIG is arguably back to hard-mode development by needing to improve the physical layer once more – this time to enable it to run at around 30GHz. Though how much of this heavy lifting will be accomplished through smart signaling (and retimers) and how much will be accomplished through sheer materials improvements, such as thicker printed circuit boards (PCBs) and low-loss materials, remains to be seen.
The next major step for PCIe 7.0 is finalization of the version 0.7 of specification, which is considered the Complete Draft, where all aspects must be fully defined, and electrical specifications must be validated through test chips. After this iteration of the specification is released, no new features can be added. PCIe 6.0 eventually went through 4 major drafts – 0.3, 0.5, 0.7, and 0.9 – before finally being finalized, so PCIe 7.0 is likely on the same track.
Once finalized in 2025, it should take a few years for the first PCIe 7.0 hardware to hit the shelves. Although development work on controller IP and initial hardware is already underway, that process extends well beyond the release of the final PCIe specification.
CPUs
Western Digital Introduces 4 TB microSDUC, 8 TB SDUC, and 16 TB External SSDs
Western Digital's BiCS8 218-layer 3D NAND is being put to good use in a wide range of client and enterprise platforms, including WD's upcoming Gen 5 client SSDs and 128 TB-class datacenter SSD. On the external storage front, the company demonstrated four different products: for card-based media, 4 TB microSDUC and 8 TB SDUC cards with UHS-I speeds, and on the portable SSD front we had two 16 TB drives. One will be a SanDisk Desk Drive with external power, and the other in the SanDisk Extreme Pro housing with a lanyard opening in the case.
All of these are using BiCS8 QLC NAND, though I did hear booth talk (as I was taking leave) that they were not supposed to divulge the use of QLC in these products. The 4 TB microSDUC and 8 TB SDUC cards are rated for UHS-I speeds. They are being marketed under the SanDisk Ultra branding.
The SanDisk Desk Drive is an external SSD with a 18W power adapter, and it has been in the market for a few months now. Initially launched in capacities up to 8 TB, Western Digital had promised a 16 TB version before the end of the year. It appears that the product is coming to retail quite soon. One aspect to note is that this drive has been using TLC for the SKUs that are currently in the market, so it appears unlikely that the 16 TB version would be QLC. The units (at least up to the 8 TB capacity point) come with two SN850XE drives. Given the recent introduction of the 8 TB SN850X, an 'E' version with tweaked firmware is likely to be present in the 16 TB Desk Drive.
The 16 TB portable SSD in the SanDisk Extreme housing was a technology demonstration. It is definitely the highest capacity bus-powered portable SSD demonstrated by any vendor at any trade show thus far. Given the 16 TB Desk Drive's imminent market introduction, it is just a matter of time before the technology demonstration of the bus-powered version becomes a retail reality.
Storage
Samsung's 128 TB-Class BM1743 Enterprise SSD Displayed at FMS 2024
Samsung had quietly launched its BM1743 enterprise QLC SSD last month with a hefty 61.44 TB SKU. At FMS 2024, the company had the even larger 122.88 TB version of that SSD on display, alongside a few recorded benchmarking sessions. Compared to the previous generation, the BM1743 comes with a 4.1x improvement in I/O performance, improvement in data retention, and a 45% improvement in power efficiency for sequential writes.
The 128 TB-class QLC SSD boasts of sequential read speeds of 7.5 GBps and write speeds of 3 GBps. Random reads come in at 1.6 M IOPS, while 16 KB random writes clock in at 45K IOPS. Based on the quoted random write access granularity, it appears that Samsung is using a 16 KB indirection unit (IU) to optimize flash management. This is similar to the strategy adopted by Solidigm with IUs larger than 4K in their high-capacity SSDs.
A recorded benchmark session on the company's PM9D3a 8-channel Gen 5 SSD was also on display.
The SSD family is being promoted as a mainstream option for datacenters, and boasts of sequential reads up to 12 GBps and writes up to 6.8 GBps. Random reads clock in at 2 M IOPS, and random writes at 400 K IOPS.
Available in multiple form-factors up to 32 TB (M.2 tops out at 2 TB), the drive's firmware includes optional support for flexible data placement (FDP) to help address the write amplification aspect.
The PM1753 is the current enterprise SSD flagship in Samsung's lineup. With support for 16 NAND channels and capacities up to 32 TB, this U.2 / E3.S SSD has advertised sequential read and write speeds of 14.8 GBps and 11 GBps respectively. Random reads and writes for 4 KB accesses are listed at 3.4 M and 600 K IOPS.
Samsung claims a 1.7x performance improvement and a 1.7x power efficiency improvement over the previous generation (PM1743), making this TLC SSD suitable for AI servers.
The 9th Gen. V-NAND wafer was also available for viewing, though photography was prohibited. Mass production of this flash memory began in April 2024.
Storage
Rapidus Wants to Offer Fully Automated Packaging for 2nm Fab to Cut Chip Lead Times
One of the core challenges that Rapidus will face when it kicks off volume production of chips on its 2nm-class process technology in 2027 is lining up customers. With Intel, Samsung, and TSMC all slated to offer their own 2nm-class nodes by that time, Rapidus will need some kind of advantage to attract customers away from its more established rivals. To that end, the company thinks they've found their edge: fully automated packaging that will allow for shorter chip lead times than manned packaging operations.
In an interview with Nikkei, Rapidus' president, Atsuyoshi Koike, outlined the company's vision to use advanced packaging as a competitive edge for the new fab. The Hokkaido facility, which is currently under construction and is expecting to begin equipment installation this December, is already slated to both produce chips and offer advanced packaging services within the same facility, an industry first. But ultimately, Rapidus biggest plan to differentiate itself is by automating the back-end fab processes (chip packaging) to provide significantly faster turnaround times.
Rapidus is targetting back-end production in particular as, compared to front-end (lithography) production, back-end production still heavily relies on human labor. No other advanced packaging fab has fully automated the process thus far, which provides for a degree of flexibility, but slows throughput. But with automation in place to handle this aspect of chip production, Rapidus would be able to increase chip packaging efficiency and speed, which is crucial as chip assembly tasks become more complex. Rapidus is also collaborating with multiple Japanese suppliers to source materials for back-end production.
"In the past, Japanese chipmakers tried to keep their technology development exclusively in-house, which pushed up development costs and made them less competitive," Koike told Nikkei. "[Rapidus plans to] open up technology that should be standardized, bringing down costs, while handling important technology in-house."
Financially, Rapidus faces a significant challenge, needing a total of ¥5 trillion ($35 billion) by the time mass production starts in 2027. The company estimates that ¥2 trillion will be required by 2025 for prototype production. While the Japanese government has provided ¥920 billion in aid, Rapidus still needs to secure substantial funding from private investors.
Due to its lack of track record and experience of chip production as. well as limited visibility for success, Rapidus is finding it difficult to attract private financing. The company is in discussions with the government to make it easier to raise capital, including potential loan guarantees, and is hopeful that new legislation will assist in this effort.
Semiconductors
Rapidus Wants to Offer Fully Automated Packaging for 2nm Fab to Cut Chip Lead Times
One of the core challenges that Rapidus will face when it kicks off volume production of chips on its 2nm-class process technology in 2027 is lining up customers. With Intel, Samsung, and TSMC all slated to offer their own 2nm-class nodes by that time, Rapidus will need some kind of advantage to attract customers away from its more established rivals. To that end, the company thinks they've found their edge: fully automated packaging that will allow for shorter chip lead times than manned packaging operations.
In an interview with Nikkei, Rapidus' president, Atsuyoshi Koike, outlined the company's vision to use advanced packaging as a competitive edge for the new fab. The Hokkaido facility, which is currently under construction and is expecting to begin equipment installation this December, is already slated to both produce chips and offer advanced packaging services within the same facility, an industry first. But ultimately, Rapidus biggest plan to differentiate itself is by automating the back-end fab processes (chip packaging) to provide significantly faster turnaround times.
Rapidus is targetting back-end production in particular as, compared to front-end (lithography) production, back-end production still heavily relies on human labor. No other advanced packaging fab has fully automated the process thus far, which provides for a degree of flexibility, but slows throughput. But with automation in place to handle this aspect of chip production, Rapidus would be able to increase chip packaging efficiency and speed, which is crucial as chip assembly tasks become more complex. Rapidus is also collaborating with multiple Japanese suppliers to source materials for back-end production.
"In the past, Japanese chipmakers tried to keep their technology development exclusively in-house, which pushed up development costs and made them less competitive," Koike told Nikkei. "[Rapidus plans to] open up technology that should be standardized, bringing down costs, while handling important technology in-house."
Financially, Rapidus faces a significant challenge, needing a total of ¥5 trillion ($35 billion) by the time mass production starts in 2027. The company estimates that ¥2 trillion will be required by 2025 for prototype production. While the Japanese government has provided ¥920 billion in aid, Rapidus still needs to secure substantial funding from private investors.
Due to its lack of track record and experience of chip production as. well as limited visibility for success, Rapidus is finding it difficult to attract private financing. The company is in discussions with the government to make it easier to raise capital, including potential loan guarantees, and is hopeful that new legislation will assist in this effort.
Semiconductors
Western Digital Introduces 4 TB microSDUC, 8 TB SDUC, and 16 TB External SSDs
Western Digital's BiCS8 218-layer 3D NAND is being put to good use in a wide range of client and enterprise platforms, including WD's upcoming Gen 5 client SSDs and 128 TB-class datacenter SSD. On the external storage front, the company demonstrated four different products: for card-based media, 4 TB microSDUC and 8 TB SDUC cards with UHS-I speeds, and on the portable SSD front we had two 16 TB drives. One will be a SanDisk Desk Drive with external power, and the other in the SanDisk Extreme Pro housing with a lanyard opening in the case.
All of these are using BiCS8 QLC NAND, though I did hear booth talk (as I was taking leave) that they were not supposed to divulge the use of QLC in these products. The 4 TB microSDUC and 8 TB SDUC cards are rated for UHS-I speeds. They are being marketed under the SanDisk Ultra branding.
The SanDisk Desk Drive is an external SSD with a 18W power adapter, and it has been in the market for a few months now. Initially launched in capacities up to 8 TB, Western Digital had promised a 16 TB version before the end of the year. It appears that the product is coming to retail quite soon. One aspect to note is that this drive has been using TLC for the SKUs that are currently in the market, so it appears unlikely that the 16 TB version would be QLC. The units (at least up to the 8 TB capacity point) come with two SN850XE drives. Given the recent introduction of the 8 TB SN850X, an 'E' version with tweaked firmware is likely to be present in the 16 TB Desk Drive.
The 16 TB portable SSD in the SanDisk Extreme housing was a technology demonstration. It is definitely the highest capacity bus-powered portable SSD demonstrated by any vendor at any trade show thus far. Given the 16 TB Desk Drive's imminent market introduction, it is just a matter of time before the technology demonstration of the bus-powered version becomes a retail reality.
Storage
![](https://twitter.com/share?url=https://compbuddey.blogspot.com/2024/08/best-buy-briefly-lists-amds-ryzen-9000.html&text=Best Buy Briefly Lists AMD's Ryzen 9000 CPUs: From $279 to $599 <p align="center"><a href="https://www.anandtech.com/show/21495/best-buy-lists-amds-ryzen-9000-cpus-from-279-to-599"><img src="https://images.anandtech.com/doci/21495/2613900-amd-ryzen-9000-series-processor-tile_575px.jpg" alt="" /></a></p><p><p>Although AMD delayed launch of its Ryzen 9000-series processors based on the Zen 5 microarchitecture from July 31, to early and mid-August, the company's partner (and major US retailer) Best Buy briefly began listing the new CPUs today, revealing a very plausible set of launch prices. As per the retailer's product catalog, the most affordable unlocked Zen 5-based processor will cost $279, whereas the highest-performing Zen 5-powered CPU will cost $599 at launch.</p>
<p>AMD will start its Ryzen 9000 series rollout from relatively inexpensive six-core Ryzen 5 9600X and eight-core Ryzen 7 9700X on August 8. Per the Best Buy listing, the Ryzen 5 9600X will cost $279, whereas the Ryzen 7 9700X will carry a recommended price tag of $359. Meanwhile, The more advanced 12-core Ryzen 9 9900X and 16-core Ryzen 9 9950X will hit the market on August 15 at MSRPs of $449 and $599, respectively, based on the Best Buy listing.</p>
<table border="0" style="text-align:center" width="95%">
<tbody>
<tr class="tgrey">
<td colspan="8">AMD Ryzen 9000 Series Processors<br />
Zen 5 Microarchitecture (Granite Ridge)</td>
</tr>
<tr class="tlblue">
<td><em>AnandTech</em></td>
<td>Cores /<br />
Threads</td>
<td>Base<br />
Freq</td>
<td>Turbo<br />
Freq</td>
<td>L2<br />
Cache</td>
<td>L3<br />
Cache</td>
<td>TDP</td>
<td>MSRP</td>
</tr>
<tr>
<td class="tlgrey"><b>Ryzen 9 9950X</b></td>
<td>16C / 32T</td>
<td>4.3GHz</td>
<td>5.7GHz</td>
<td>16 MB</td>
<td>64 MB</td>
<td>170 W</td>
<td><em>$599</em></td>
</tr>
<tr>
<td class="tlgrey"><b>Ryzen 9 9900X</b></td>
<td>12C / 24T</td>
<td>4.4GHz</td>
<td>5.6GHz</td>
<td>12 MB</td>
<td>64 MB</td>
<td>120 W</td>
<td><em>$449</em></td>
</tr>
<tr>
<td class="tlgrey"><b>Ryzen 7 9700X</b></td>
<td>8C / 16T</td>
<td>3.8GHz</td>
<td>5.5GHz</td>
<td>8 MB</td>
<td>32 MB</td>
<td>65 W</td>
<td><em>$359</em></td>
</tr>
<tr>
<td class="tlgrey"><b>Ryzen 5 9600X</b></td>
<td>6C / 12T</td>
<td>3.9GHz</td>
<td>5.4GHz</td>
<td>6 MB</td>
<td>32 MB</td>
<td>65 W</td>
<td><em>$279</em></td>
</tr>
</tbody>
</table>
<p>It is noteworthy that when compared to the launch prices of the Zen 4-based Ryzen 7000 processors, the new Zen 5-powered Ryzen 9000 CPUs come in cheaper. The range topping Ryzen 9 5950X started at $799 in 2020, while the Ryzen 9 7950X had a recommended $699 price tag in 2022. By contrast, the top-end Ryzen 9 9950X is listed at $599. Both Ryzen 7 5600X and Ryzen 7 7600X cost $299 at launch, while the upcoming Ryzen 5 9600X will apparently be priced at $279 at launch.</p>
<p>As always with accidental retailer listings, it should be emphasized that AMD has not yet announced official pricing for their Ryzen 9000 CPUs. Given Best Buy's status as one of the largest US electronics retailers, these prices carry a very high probability of being accurate; but none the less, they should be taken with a grain of salt – if only because last-minute price changes are not unheard of with new CPU launches.</p>
<p style="text-align: center;"><a href="https://www.anandtech.com/show/21495/best-buy-lists-amds-ryzen-9000-cpus-from-279-to-599"><img alt="" src="https://images.anandtech.com/doci/21495/GT0TH6zbwAMc9hj_575px.png" /></a></p>
<p>Source: <a href="http://www.bestbuy.com">Best Buy</a> (via <a href="https://x.com/momomo_us/status/1818631374707761456">@momomo_us</a>)</p>
</p> CPUs){kind=link}
![](https://www.pinterest.com/pin/create/button/?url=https://compbuddey.blogspot.com/2024/08/best-buy-briefly-lists-amds-ryzen-9000.html&media=https://lh3.googleusercontent.com/blogger_img_proxy/AEn0k_tOdRQOnrGnh3LCMEFSA36lecFuxSJ3yN8oL30eVYE9fZoFDHn90Aru6_Skr9wC6WBGiT2zoF4AWPSNlpzeVOydLBTsdBOA1fsQYDv2mzNCuFhTtq9UGbdZ3M9CcIWGIhyZnH5bRNkpGq_6jz1kXT5O4gtmDsWF_mHbkofv41GkKdU&description=Best Buy Briefly Lists AMD's Ryzen 9000 CPUs: From $279 to $599 <p align="center"><a href="https://www.anandtech.com/show/21495/best-buy-lists-amds-ryzen-9000-cpus-from-279-to-599"><img src="https://images.anandtech.com/doci/21495/2613900-amd-ryzen-9000-series-processor-tile_575px.jpg" alt="" /></a></p><p><p>Although AMD delayed launch of its Ryzen 9000-series processors based on the Zen 5 microarchitecture from July 31, to early and mid-August, the company's partner (and major US retailer) Best Buy briefly began listing the new CPUs today, revealing a very plausible set of launch prices. As per the retailer's product catalog, the most affordable unlocked Zen 5-based processor will cost $279, whereas the highest-performing Zen 5-powered CPU will cost $599 at launch.</p>
<p>AMD will start its Ryzen 9000 series rollout from relatively inexpensive six-core Ryzen 5 9600X and eight-core Ryzen 7 9700X on August 8. Per the Best Buy listing, the Ryzen 5 9600X will cost $279, whereas the Ryzen 7 9700X will carry a recommended price tag of $359. Meanwhile, The more advanced 12-core Ryzen 9 9900X and 16-core Ryzen 9 9950X will hit the market on August 15 at MSRPs of $449 and $599, respectively, based on the Best Buy listing.</p>
<table border="0" style="text-align:center" width="95%">
<tbody>
<tr class="tgrey">
<td colspan="8">AMD Ryzen 9000 Series Processors<br />
Zen 5 Microarchitecture (Granite Ridge)</td>
</tr>
<tr class="tlblue">
<td><em>AnandTech</em></td>
<td>Cores /<br />
Threads</td>
<td>Base<br />
Freq</td>
<td>Turbo<br />
Freq</td>
<td>L2<br />
Cache</td>
<td>L3<br />
Cache</td>
<td>TDP</td>
<td>MSRP</td>
</tr>
<tr>
<td class="tlgrey"><b>Ryzen 9 9950X</b></td>
<td>16C / 32T</td>
<td>4.3GHz</td>
<td>5.7GHz</td>
<td>16 MB</td>
<td>64 MB</td>
<td>170 W</td>
<td><em>$599</em></td>
</tr>
<tr>
<td class="tlgrey"><b>Ryzen 9 9900X</b></td>
<td>12C / 24T</td>
<td>4.4GHz</td>
<td>5.6GHz</td>
<td>12 MB</td>
<td>64 MB</td>
<td>120 W</td>
<td><em>$449</em></td>
</tr>
<tr>
<td class="tlgrey"><b>Ryzen 7 9700X</b></td>
<td>8C / 16T</td>
<td>3.8GHz</td>
<td>5.5GHz</td>
<td>8 MB</td>
<td>32 MB</td>
<td>65 W</td>
<td><em>$359</em></td>
</tr>
<tr>
<td class="tlgrey"><b>Ryzen 5 9600X</b></td>
<td>6C / 12T</td>
<td>3.9GHz</td>
<td>5.4GHz</td>
<td>6 MB</td>
<td>32 MB</td>
<td>65 W</td>
<td><em>$279</em></td>
</tr>
</tbody>
</table>
<p>It is noteworthy that when compared to the launch prices of the Zen 4-based Ryzen 7000 processors, the new Zen 5-powered Ryzen 9000 CPUs come in cheaper. The range topping Ryzen 9 5950X started at $799 in 2020, while the Ryzen 9 7950X had a recommended $699 price tag in 2022. By contrast, the top-end Ryzen 9 9950X is listed at $599. Both Ryzen 7 5600X and Ryzen 7 7600X cost $299 at launch, while the upcoming Ryzen 5 9600X will apparently be priced at $279 at launch.</p>
<p>As always with accidental retailer listings, it should be emphasized that AMD has not yet announced official pricing for their Ryzen 9000 CPUs. Given Best Buy's status as one of the largest US electronics retailers, these prices carry a very high probability of being accurate; but none the less, they should be taken with a grain of salt – if only because last-minute price changes are not unheard of with new CPU launches.</p>
<p style="text-align: center;"><a href="https://www.anandtech.com/show/21495/best-buy-lists-amds-ryzen-9000-cpus-from-279-to-599"><img alt="" src="https://images.anandtech.com/doci/21495/GT0TH6zbwAMc9hj_575px.png" /></a></p>
<p>Source: <a href="http://www.bestbuy.com">Best Buy</a> (via <a href="https://x.com/momomo_us/status/1818631374707761456">@momomo_us</a>)</p>
</p> CPUs){kind=link}
![](https://web.whatsapp.com/send?text=Best Buy Briefly Lists AMD's Ryzen 9000 CPUs: From $279 to $599 <p align="center"><a href="https://www.anandtech.com/show/21495/best-buy-lists-amds-ryzen-9000-cpus-from-279-to-599"><img src="https://images.anandtech.com/doci/21495/2613900-amd-ryzen-9000-series-processor-tile_575px.jpg" alt="" /></a></p><p><p>Although AMD delayed launch of its Ryzen 9000-series processors based on the Zen 5 microarchitecture from July 31, to early and mid-August, the company's partner (and major US retailer) Best Buy briefly began listing the new CPUs today, revealing a very plausible set of launch prices. As per the retailer's product catalog, the most affordable unlocked Zen 5-based processor will cost $279, whereas the highest-performing Zen 5-powered CPU will cost $599 at launch.</p>
<p>AMD will start its Ryzen 9000 series rollout from relatively inexpensive six-core Ryzen 5 9600X and eight-core Ryzen 7 9700X on August 8. Per the Best Buy listing, the Ryzen 5 9600X will cost $279, whereas the Ryzen 7 9700X will carry a recommended price tag of $359. Meanwhile, The more advanced 12-core Ryzen 9 9900X and 16-core Ryzen 9 9950X will hit the market on August 15 at MSRPs of $449 and $599, respectively, based on the Best Buy listing.</p>
<table border="0" style="text-align:center" width="95%">
<tbody>
<tr class="tgrey">
<td colspan="8">AMD Ryzen 9000 Series Processors<br />
Zen 5 Microarchitecture (Granite Ridge)</td>
</tr>
<tr class="tlblue">
<td><em>AnandTech</em></td>
<td>Cores /<br />
Threads</td>
<td>Base<br />
Freq</td>
<td>Turbo<br />
Freq</td>
<td>L2<br />
Cache</td>
<td>L3<br />
Cache</td>
<td>TDP</td>
<td>MSRP</td>
</tr>
<tr>
<td class="tlgrey"><b>Ryzen 9 9950X</b></td>
<td>16C / 32T</td>
<td>4.3GHz</td>
<td>5.7GHz</td>
<td>16 MB</td>
<td>64 MB</td>
<td>170 W</td>
<td><em>$599</em></td>
</tr>
<tr>
<td class="tlgrey"><b>Ryzen 9 9900X</b></td>
<td>12C / 24T</td>
<td>4.4GHz</td>
<td>5.6GHz</td>
<td>12 MB</td>
<td>64 MB</td>
<td>120 W</td>
<td><em>$449</em></td>
</tr>
<tr>
<td class="tlgrey"><b>Ryzen 7 9700X</b></td>
<td>8C / 16T</td>
<td>3.8GHz</td>
<td>5.5GHz</td>
<td>8 MB</td>
<td>32 MB</td>
<td>65 W</td>
<td><em>$359</em></td>
</tr>
<tr>
<td class="tlgrey"><b>Ryzen 5 9600X</b></td>
<td>6C / 12T</td>
<td>3.9GHz</td>
<td>5.4GHz</td>
<td>6 MB</td>
<td>32 MB</td>
<td>65 W</td>
<td><em>$279</em></td>
</tr>
</tbody>
</table>
<p>It is noteworthy that when compared to the launch prices of the Zen 4-based Ryzen 7000 processors, the new Zen 5-powered Ryzen 9000 CPUs come in cheaper. The range topping Ryzen 9 5950X started at $799 in 2020, while the Ryzen 9 7950X had a recommended $699 price tag in 2022. By contrast, the top-end Ryzen 9 9950X is listed at $599. Both Ryzen 7 5600X and Ryzen 7 7600X cost $299 at launch, while the upcoming Ryzen 5 9600X will apparently be priced at $279 at launch.</p>
<p>As always with accidental retailer listings, it should be emphasized that AMD has not yet announced official pricing for their Ryzen 9000 CPUs. Given Best Buy's status as one of the largest US electronics retailers, these prices carry a very high probability of being accurate; but none the less, they should be taken with a grain of salt – if only because last-minute price changes are not unheard of with new CPU launches.</p>
<p style="text-align: center;"><a href="https://www.anandtech.com/show/21495/best-buy-lists-amds-ryzen-9000-cpus-from-279-to-599"><img alt="" src="https://images.anandtech.com/doci/21495/GT0TH6zbwAMc9hj_575px.png" /></a></p>
<p>Source: <a href="http://www.bestbuy.com">Best Buy</a> (via <a href="https://x.com/momomo_us/status/1818631374707761456">@momomo_us</a>)</p>
</p> CPUs | https://compbuddey.blogspot.com/2024/08/best-buy-briefly-lists-amds-ryzen-9000.html){kind=link}
![](mailto:?subject=Best Buy Briefly Lists AMD's Ryzen 9000 CPUs: From $279 to $599 <p align="center"><a href="https://www.anandtech.com/show/21495/best-buy-lists-amds-ryzen-9000-cpus-from-279-to-599"><img src="https://images.anandtech.com/doci/21495/2613900-amd-ryzen-9000-series-processor-tile_575px.jpg" alt="" /></a></p><p><p>Although AMD delayed launch of its Ryzen 9000-series processors based on the Zen 5 microarchitecture from July 31, to early and mid-August, the company's partner (and major US retailer) Best Buy briefly began listing the new CPUs today, revealing a very plausible set of launch prices. As per the retailer's product catalog, the most affordable unlocked Zen 5-based processor will cost $279, whereas the highest-performing Zen 5-powered CPU will cost $599 at launch.</p>
<p>AMD will start its Ryzen 9000 series rollout from relatively inexpensive six-core Ryzen 5 9600X and eight-core Ryzen 7 9700X on August 8. Per the Best Buy listing, the Ryzen 5 9600X will cost $279, whereas the Ryzen 7 9700X will carry a recommended price tag of $359. Meanwhile, The more advanced 12-core Ryzen 9 9900X and 16-core Ryzen 9 9950X will hit the market on August 15 at MSRPs of $449 and $599, respectively, based on the Best Buy listing.</p>
<table border="0" style="text-align:center" width="95%">
<tbody>
<tr class="tgrey">
<td colspan="8">AMD Ryzen 9000 Series Processors<br />
Zen 5 Microarchitecture (Granite Ridge)</td>
</tr>
<tr class="tlblue">
<td><em>AnandTech</em></td>
<td>Cores /<br />
Threads</td>
<td>Base<br />
Freq</td>
<td>Turbo<br />
Freq</td>
<td>L2<br />
Cache</td>
<td>L3<br />
Cache</td>
<td>TDP</td>
<td>MSRP</td>
</tr>
<tr>
<td class="tlgrey"><b>Ryzen 9 9950X</b></td>
<td>16C / 32T</td>
<td>4.3GHz</td>
<td>5.7GHz</td>
<td>16 MB</td>
<td>64 MB</td>
<td>170 W</td>
<td><em>$599</em></td>
</tr>
<tr>
<td class="tlgrey"><b>Ryzen 9 9900X</b></td>
<td>12C / 24T</td>
<td>4.4GHz</td>
<td>5.6GHz</td>
<td>12 MB</td>
<td>64 MB</td>
<td>120 W</td>
<td><em>$449</em></td>
</tr>
<tr>
<td class="tlgrey"><b>Ryzen 7 9700X</b></td>
<td>8C / 16T</td>
<td>3.8GHz</td>
<td>5.5GHz</td>
<td>8 MB</td>
<td>32 MB</td>
<td>65 W</td>
<td><em>$359</em></td>
</tr>
<tr>
<td class="tlgrey"><b>Ryzen 5 9600X</b></td>
<td>6C / 12T</td>
<td>3.9GHz</td>
<td>5.4GHz</td>
<td>6 MB</td>
<td>32 MB</td>
<td>65 W</td>
<td><em>$279</em></td>
</tr>
</tbody>
</table>
<p>It is noteworthy that when compared to the launch prices of the Zen 4-based Ryzen 7000 processors, the new Zen 5-powered Ryzen 9000 CPUs come in cheaper. The range topping Ryzen 9 5950X started at $799 in 2020, while the Ryzen 9 7950X had a recommended $699 price tag in 2022. By contrast, the top-end Ryzen 9 9950X is listed at $599. Both Ryzen 7 5600X and Ryzen 7 7600X cost $299 at launch, while the upcoming Ryzen 5 9600X will apparently be priced at $279 at launch.</p>
<p>As always with accidental retailer listings, it should be emphasized that AMD has not yet announced official pricing for their Ryzen 9000 CPUs. Given Best Buy's status as one of the largest US electronics retailers, these prices carry a very high probability of being accurate; but none the less, they should be taken with a grain of salt – if only because last-minute price changes are not unheard of with new CPU launches.</p>
<p style="text-align: center;"><a href="https://www.anandtech.com/show/21495/best-buy-lists-amds-ryzen-9000-cpus-from-279-to-599"><img alt="" src="https://images.anandtech.com/doci/21495/GT0TH6zbwAMc9hj_575px.png" /></a></p>
<p>Source: <a href="http://www.bestbuy.com">Best Buy</a> (via <a href="https://x.com/momomo_us/status/1818631374707761456">@momomo_us</a>)</p>
</p> CPUs&body=https://compbuddey.blogspot.com/2024/08/best-buy-briefly-lists-amds-ryzen-9000.html){kind=link}
Lorem Ipsum is simply dummy text of the printing and typesetting industry. Lorem Ipsum has been the industry's.
PCIe 7.0 Draft 0.5 Spec Available: 512 GB/s over PCIe x16 On Track For 2025
PCI-SIG this week released version 0.5 of the PCI-Express 7.0 specification to its members. This is the second draft of the spec and the final call for PCI-SIG members to submit their new features to the standard. The latest update on the development of the specification comes a couple months shy of a year after the PCI-SIG published the initial Draft 0.3 specificaiton, with the PCI-SIG using the latest update to reiterate that development of the new standard remains on-track for a final release in 2025.
PCIe 7.0 is is the next generation interconnect technology for computers that is set to increase data transfer speeds to 128 GT/s per pin, doubling the 64 GT/s of PCIe 6.0 and quadrupling the 32 GT/s of PCIe 5.0. This would allow a 16-lane (x16) connection to support 256 GB/sec of bandwidth in each direction simultaneously, excluding encoding overhead. Such speeds will be handy for future datacenters as well as artificial intelligence and high-performance computing applications that will need even faster data transfer rates, including network data transfer rates.
To achieve its impressive data transfer rates, PCIe 7.0 doubles the bus frequency at the physical layer compared to PCIe 5.0 and 6.0. Otherwise, the standard retains pulse amplitude modulation with four level signaling (PAM4), 1b/1b FLIT mode encoding, and the forward error correction (FEC) technologies that are already used for PCIe 6.0. Otherwise, PCI-SIG says that the PCIe 7.0 speicification also focuses on enhanced channel parameters and reach as well as improved power efficiency.
Overall, the engineers behind the standard have their work cut out for them, given that PCIe 7.0 requires doubling the bus frequency at the physical layer, a major development that PCIe 6.0 sidestepped with PAM4 signaling. Nothing comes for free in regards to improving data signaling, and with PCIe 7.0, the PCI-SIG is arguably back to hard-mode development by needing to improve the physical layer once more – this time to enable it to run at around 30GHz. Though how much of this heavy lifting will be accomplished through smart signaling (and retimers) and how much will be accomplished through sheer materials improvements, such as thicker printed circuit boards (PCBs) and low-loss materials, remains to be seen.
The next major step for PCIe 7.0 is finalization of the version 0.7 of specification, which is considered the Complete Draft, where all aspects must be fully defined, and electrical specifications must be validated through test chips. After this iteration of the specification is released, no new features can be added. PCIe 6.0 eventually went through 4 major drafts – 0.3, 0.5, 0.7, and 0.9 – before finally being finalized, so PCIe 7.0 is likely on the same track.
Once finalized in 2025, it should take a few years for the first PCIe 7.0 hardware to hit the shelves. Although development work on controller IP and initial hardware is already underway, that process extends well beyond the release of the final PCIe specification.
CPUs
Western Digital Introduces 4 TB microSDUC, 8 TB SDUC, and 16 TB External SSDs
Western Digital's BiCS8 218-layer 3D NAND is being put to good use in a wide range of client and enterprise platforms, including WD's upcoming Gen 5 client SSDs and 128 TB-class datacenter SSD. On the external storage front, the company demonstrated four different products: for card-based media, 4 TB microSDUC and 8 TB SDUC cards with UHS-I speeds, and on the portable SSD front we had two 16 TB drives. One will be a SanDisk Desk Drive with external power, and the other in the SanDisk Extreme Pro housing with a lanyard opening in the case.
All of these are using BiCS8 QLC NAND, though I did hear booth talk (as I was taking leave) that they were not supposed to divulge the use of QLC in these products. The 4 TB microSDUC and 8 TB SDUC cards are rated for UHS-I speeds. They are being marketed under the SanDisk Ultra branding.
The SanDisk Desk Drive is an external SSD with a 18W power adapter, and it has been in the market for a few months now. Initially launched in capacities up to 8 TB, Western Digital had promised a 16 TB version before the end of the year. It appears that the product is coming to retail quite soon. One aspect to note is that this drive has been using TLC for the SKUs that are currently in the market, so it appears unlikely that the 16 TB version would be QLC. The units (at least up to the 8 TB capacity point) come with two SN850XE drives. Given the recent introduction of the 8 TB SN850X, an 'E' version with tweaked firmware is likely to be present in the 16 TB Desk Drive.
The 16 TB portable SSD in the SanDisk Extreme housing was a technology demonstration. It is definitely the highest capacity bus-powered portable SSD demonstrated by any vendor at any trade show thus far. Given the 16 TB Desk Drive's imminent market introduction, it is just a matter of time before the technology demonstration of the bus-powered version becomes a retail reality.
Storage
Samsung's 128 TB-Class BM1743 Enterprise SSD Displayed at FMS 2024
Samsung had quietly launched its BM1743 enterprise QLC SSD last month with a hefty 61.44 TB SKU. At FMS 2024, the company had the even larger 122.88 TB version of that SSD on display, alongside a few recorded benchmarking sessions. Compared to the previous generation, the BM1743 comes with a 4.1x improvement in I/O performance, improvement in data retention, and a 45% improvement in power efficiency for sequential writes.
The 128 TB-class QLC SSD boasts of sequential read speeds of 7.5 GBps and write speeds of 3 GBps. Random reads come in at 1.6 M IOPS, while 16 KB random writes clock in at 45K IOPS. Based on the quoted random write access granularity, it appears that Samsung is using a 16 KB indirection unit (IU) to optimize flash management. This is similar to the strategy adopted by Solidigm with IUs larger than 4K in their high-capacity SSDs.
A recorded benchmark session on the company's PM9D3a 8-channel Gen 5 SSD was also on display.
The SSD family is being promoted as a mainstream option for datacenters, and boasts of sequential reads up to 12 GBps and writes up to 6.8 GBps. Random reads clock in at 2 M IOPS, and random writes at 400 K IOPS.
Available in multiple form-factors up to 32 TB (M.2 tops out at 2 TB), the drive's firmware includes optional support for flexible data placement (FDP) to help address the write amplification aspect.
The PM1753 is the current enterprise SSD flagship in Samsung's lineup. With support for 16 NAND channels and capacities up to 32 TB, this U.2 / E3.S SSD has advertised sequential read and write speeds of 14.8 GBps and 11 GBps respectively. Random reads and writes for 4 KB accesses are listed at 3.4 M and 600 K IOPS.
Samsung claims a 1.7x performance improvement and a 1.7x power efficiency improvement over the previous generation (PM1743), making this TLC SSD suitable for AI servers.
The 9th Gen. V-NAND wafer was also available for viewing, though photography was prohibited. Mass production of this flash memory began in April 2024.
Storage
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